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uart8250: Fix and unify baudrate divisor calculation

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Divisor is a function of requested baudrate, platform-specific
reference clock and amount of oversampling done on the UART reference.
Calculate this parameter with divisor rounded to nearest integer.

When building without option_table or when there is no entry for
baud_rate, CONFIG_TTYS0_BAUD is used for default baudrate.

For OxPCIe use of 4 MHz for reference was arbitrary giving correct
divisor for 115200 but somewhat inaccurate for lower baudrates.
Actual hardware is 62500000 with 16 times oversampling.

FIXME: Field for baudrate in lb_tables is still incorrect.

Change-Id: I68539738469af780fadd3392263dd9b3d5964d2d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/5229
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Kyösti Mälkki
2014-02-17 19:37:52 +02:00
parent c76b3d6cca
commit 3ee1668ab4
8 changed files with 91 additions and 54 deletions
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35
src/lib/uart8250.c
View File

@@ -21,15 +21,16 @@
#include <arch/io.h>
#include <uart.h>
#include <uart8250.h>
#include <pc80/mc146818rtc.h>
#include <trace.h>
#if CONFIG_USE_OPTION_TABLE
#include "option_table.h"
#endif
/* Should support 8250, 16450, 16550, 16550A type UARTs */
/* Nominal values only, good for the range of choices Kconfig offers for
* set of standard baudrates.
*/
#define BAUDRATE_REFCLK (115200)
#define BAUDRATE_OVERSAMPLE (1)
/* Expected character delay at 1200bps is 9ms for a working UART
* and no flow-control. Assume UART as stuck if shift register
* or FIFO takes more than 50ms per character to appear empty.
@@ -108,26 +109,8 @@ void uart8250_init(unsigned base_port, unsigned divisor)
void uart_init(void)
{
/* TODO the divisor calculation is hard coded to standard UARTs. Some
* UARTs won't work with these values. This should be a property of the
* UART used, worst case a Kconfig variable. For now live with hard
* codes as the only devices that might be different are the iWave
* iRainbowG6 and the OXPCIe952 card (and the latter is memory mapped)
*/
unsigned int div = (115200 / CONFIG_TTYS0_BAUD);
#if !defined(__SMM__) && CONFIG_USE_OPTION_TABLE
static const unsigned char divisor[8] = { 1, 2, 3, 6, 12, 24, 48, 96 };
unsigned b_index = 0;
#if defined(__PRE_RAM__)
b_index = read_option(baud_rate, 0);
b_index &= 7;
div = divisor[b_index];
#else
if (get_option(&b_index, "baud_rate") == CB_SUCCESS)
div = divisor[b_index];
#endif
#endif
unsigned int div;
div = uart_baudrate_divisor(default_baudrate(), BAUDRATE_REFCLK,
BAUDRATE_OVERSAMPLE);
uart8250_init(CONFIG_TTYS0_BASE, div);
}

24
src/lib/uart8250mem.c
View File

@@ -21,10 +21,6 @@
#include <arch/io.h>
#include <uart.h>
#include <uart8250.h>
#include <pc80/mc146818rtc.h>
#if CONFIG_USE_OPTION_TABLE
#include "option_table.h"
#endif
#include <device/device.h>
#include <delay.h>
@@ -96,7 +92,6 @@ void uart8250_mem_init(unsigned base_port, unsigned divisor)
/* DLAB on */
write8(base_port + UART_LCR, UART_LCR_DLAB | CONFIG_TTYS0_LCS);
/* Set Baud Rate Divisor. 12 ==> 9600 Baud */
write8(base_port + UART_DLL, divisor & 0xFF);
write8(base_port + UART_DLM, (divisor >> 8) & 0xFF);
@@ -106,27 +101,11 @@ void uart8250_mem_init(unsigned base_port, unsigned divisor)
u32 uart_mem_init(void)
{
unsigned uart_baud = CONFIG_TTYS0_BAUD;
u32 uart_bar = 0;
unsigned div;
/* find out the correct baud rate */
#if !defined(__SMM__) && CONFIG_USE_OPTION_TABLE
static const unsigned baud[8] = { 115200, 57600, 38400, 19200, 9600, 4800, 2400, 1200 };
unsigned b_index = 0;
#if defined(__PRE_RAM__)
b_index = read_option(baud_rate, 0);
b_index &= 7;
uart_baud = baud[b_index];
#else
if (get_option(&b_index, "baud_rate") == CB_SUCCESS)
uart_baud = baud[b_index];
#endif
#endif
/* Now find the UART base address and calculate the divisor */
#if CONFIG_DRIVERS_OXFORD_OXPCIE
#if defined(MORE_TESTING) && !defined(__SIMPLE_DEVICE__)
device_t dev = dev_find_device(0x1415, 0xc158, NULL);
if (!dev)
@@ -145,10 +124,9 @@ u32 uart_mem_init(void)
#endif
uart_bar = CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000; // 1st UART
// uart_bar = CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x2000; // 2nd UART
div = 4000000 / uart_baud;
#endif
div = uart_baudrate_divisor(default_baudrate(), uart_platform_refclk(), 16);
if (uart_bar)
uart8250_mem_init(uart_bar, div);