[RFC]util/checklist: Remove this functionality
It was only hooked up for galileo board when using the obsolete FSP1.1. I don't see how it can be useful... Change-Id: Ifd7cbd664cfa3b729a11c885134fd9b5de62a96c Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/30691 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Arthur Heymans
committed by
Patrick Georgi
Patrick Georgi
parent
3d3152eec7
commit
3ef017c4d4
30
src/Kconfig
30
src/Kconfig
@@ -1091,36 +1091,6 @@ config MAX_REBOOT_CNT
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with the normal image enabled before assuming the normal image is defective
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and switching to the fallback image.
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config CREATE_BOARD_CHECKLIST
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bool
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default n
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help
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When selected, creates a webpage showing the implementation status for
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the board. Routines highlighted in green are complete, yellow are
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optional and red are required and must be implemented. A table is
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produced for each stage of the boot process except the bootblock. The
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red items may be used as an implementation checklist for the board.
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config MAKE_CHECKLIST_PUBLIC
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bool
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default n
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help
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When selected, build/$(CONFIG_MAINBOARD_PART_NUMBER)_checklist.html
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is copied into the Documentation/$(CONFIG_MAINBOARD_VENDOR)/Board
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directory.
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config CHECKLIST_DATA_FILE_LOCATION
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string
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help
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Location of the <stage>_complete.dat and <stage>_optional.dat files
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that are consumed during checklist processing. <stage>_complete.dat
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contains the symbols that are expected to be in the resulting image.
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<stage>_optional.dat is a subset of <stage>_complete.dat and contains
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a list of weak symbols which the resulting image may consume. Other
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symbols contained only in <stage>_complete.dat will be flagged as
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required and not implemented if a weak implementation is found in the
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resulting image.
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config UNCOMPRESSED_RAMSTAGE
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bool
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@@ -86,10 +86,6 @@ config USE_GENERIC_FSP_CAR_INC
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The chipset can select this to use a generic cache_as_ram.inc file
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that should be good for all FSP based platforms.
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config CHECKLIST_DATA_FILE_LOCATION
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string
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default "src/vendorcode/intel/fsp/fsp1_1/checklist"
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config RESET_ON_INVALID_RAMSTAGE_CACHE
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bool "Reset the system on S3 wake when ramstage cache invalid."
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default n
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@@ -146,10 +146,6 @@ config VERIFY_HOBS
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Verify that the HOBs required by coreboot are returned by FSP and
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that the resource HOBs are in the correct order and position.
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config CHECKLIST_DATA_FILE_LOCATION
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string
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default "src/vendorcode/intel/fsp/fsp2_0/checklist"
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config RESET_ON_INVALID_RAMSTAGE_CACHE
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bool "Reset the system on S3 wake when ramstage cache invalid."
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default n
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@@ -18,7 +18,6 @@ if BOARD_INTEL_GALILEO
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config BOARD_SPECIFIC_OPTIONS
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def_bool y
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select BOARD_ROMSIZE_KB_8192
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# select CREATE_BOARD_CHECKLIST
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select ENABLE_BUILTIN_HSUART1
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select HAVE_ACPI_TABLES
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select SOC_INTEL_QUARK
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@@ -52,7 +51,6 @@ choice
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config FSP_VERSION_1_1
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bool "FSP 1.1"
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select CREATE_BOARD_CHECKLIST
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select PLATFORM_USES_FSP1_1
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# select ADD_FSP_RAW_BIN
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help
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@@ -1,10 +0,0 @@
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bootblock_c_entry
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bootblock_mainboard_early_init
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bootblock_mainboard_init
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bootblock_main_with_timestamp
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bootblock_pre_c_entry
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bootblock_protected_mode_entry
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bootblock_soc_early_init
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bootblock_soc_init
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tsc_freq_mhz
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uart_init
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@@ -1,6 +0,0 @@
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bootblock_c_entry
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bootblock_mainboard_early_init
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bootblock_mainboard_init
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bootblock_soc_early_init
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bootblock_soc_init
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uart_init
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@@ -1,53 +0,0 @@
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acpi_create_serialio_ssdt
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arch_segment_loaded
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backup_top_of_ram
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boot_device_init
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cbfs_master_header_locator
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cbmem_fail_resume
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clear_recovery_mode_switch
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cpu_smi_handler
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fw_cfg_acpi_tables
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get_sw_write_protect_state
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get_top_of_ram
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gpio_acpi_path
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init_timer
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lb_board
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lb_framebuffer
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mainboard_add_dimm_info
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mainboard_io_trap_handler
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mainboard_post
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mainboard_silicon_init_params
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mainboard_smi_apmc
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mainboard_smi_gpi
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mainboard_smi_sleep
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mainboard_suspend_resume
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map_oprom_vendev
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mirror_payload
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northbridge_smi_handler
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nvm_mmio_to_flash_offset
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platform_prog_run
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platform_segment_loaded
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save_chromeos_gpios
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smbios_mainboard_bios_version
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smbios_mainboard_manufacturer
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smbios_mainboard_product_name
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smbios_mainboard_serial_number
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smbios_mainboard_set_uuid
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smbios_mainboard_version
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smm_disable_busmaster
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soc_after_silicon_init
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soc_display_silicon_init_params
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soc_fill_acpi_wake
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soc_silicon_init_params
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soc_skip_ucode_update
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southbridge_smi_handler
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stage_cache_add
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stage_cache_load_stage
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timestamp_get
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timestamp_tick_freq_mhz
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tsc_freq_mhz
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vb2ex_hwcrypto_digest_extend
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vb2ex_hwcrypto_digest_finalize
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vb2ex_hwcrypto_digest_init
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wifi_regulatory_domain
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write_smp_table
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@@ -1,46 +0,0 @@
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arch_segment_loaded
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backup_top_of_ram
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boot_device_init
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cbmem_fail_resume
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clear_recovery_mode_switch
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cpu_smi_handler
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fw_cfg_acpi_tables
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get_sw_write_protect_state
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get_top_of_ram
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gpio_acpi_path
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lb_board
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lb_framebuffer
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mainboard_add_dimm_info
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mainboard_io_trap_handler
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mainboard_post
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mainboard_silicon_init_params
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mainboard_smi_apmc
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mainboard_smi_gpi
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mainboard_smi_sleep
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mainboard_suspend_resume
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map_oprom_vendev
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mirror_payload
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northbridge_smi_handler
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nvm_mmio_to_flash_offset
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platform_prog_run
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platform_segment_loaded
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save_chromeos_gpios
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smbios_mainboard_bios_version
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smbios_mainboard_manufacturer
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smbios_mainboard_product_name
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smbios_mainboard_serial_number
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smbios_mainboard_set_uuid
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smbios_mainboard_version
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smm_disable_busmaster
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soc_after_silicon_init
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soc_display_silicon_init_params
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soc_silicon_init_params
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soc_skip_ucode_update
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southbridge_smi_handler
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stage_cache_add
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stage_cache_load_stage
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vb2ex_hwcrypto_digest_extend
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vb2ex_hwcrypto_digest_finalize
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vb2ex_hwcrypto_digest_init
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wifi_regulatory_domain
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write_smp_table
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@@ -1,53 +0,0 @@
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arch_segment_loaded
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backup_top_of_ram
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boot_device_init
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car_stage_entry
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cbfs_master_header_locator
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cbmem_fail_resume
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clear_recovery_mode_switch
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cpu_smi_handler
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fill_power_state
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get_sw_write_protect_state
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get_top_of_ram
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gpio_acpi_path
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init_timer
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mainboard_add_dimm_info
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mainboard_check_ec_image
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mainboard_fill_spd_data
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mainboard_io_trap_handler
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mainboard_memory_init_params
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mainboard_post
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mainboard_romstage_entry
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mainboard_save_dimm_info
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mainboard_smi_apmc
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mainboard_smi_gpi
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mainboard_smi_sleep
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map_oprom_vendev
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migrate_power_state
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mrc_cache_get_current_with_version
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mrc_cache_stash_data_with_version
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platform_prog_run
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platform_segment_loaded
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print_fsp_info
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raminit
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ramstage_cache_invalid
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report_memory_config
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romstage_common
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save_chromeos_gpios
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set_max_freq
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setup_stack_and_mtrrs
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smm_region
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smm_region_size
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soc_after_ram_init
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soc_display_memory_init_params
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soc_memory_init_params
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soc_pre_ram_init
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southbridge_smi_handler
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stage_cache_add
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stage_cache_load_stage
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timestamp_get
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tsc_freq_mhz
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vb2ex_hwcrypto_digest_extend
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vb2ex_hwcrypto_digest_finalize
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vb2ex_hwcrypto_digest_init
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vboot_platform_prepare_reboot
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@@ -1,33 +0,0 @@
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arch_segment_loaded
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backup_top_of_ram
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boot_device_init
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car_stage_entry
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cbmem_fail_resume
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clear_recovery_mode_switch
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cpu_smi_handler
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get_sw_write_protect_state
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get_top_of_ram
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gpio_acpi_path
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mainboard_add_dimm_info
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mainboard_check_ec_image
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mainboard_io_trap_handler
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mainboard_post
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mainboard_romstage_entry
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mainboard_save_dimm_info
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mainboard_smi_apmc
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mainboard_smi_gpi
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mainboard_smi_sleep
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map_oprom_vendev
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platform_prog_run
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platform_segment_loaded
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save_chromeos_gpios
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soc_after_ram_init
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soc_display_memory_init_params
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soc_memory_init_params
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soc_pre_ram_init
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southbridge_smi_handler
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stage_cache_add
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stage_cache_load_stage
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vb2ex_hwcrypto_digest_extend
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vb2ex_hwcrypto_digest_finalize
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vb2ex_hwcrypto_digest_init
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@@ -1,33 +0,0 @@
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arch_segment_loaded
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backup_top_of_ram
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boot_device_init
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car_mainboard_post_console_init
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car_mainboard_pre_console_init
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car_soc_post_console_init
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car_soc_pre_console_init
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cbfs_master_header_locator
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cbmem_fail_resume
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clear_recovery_mode_switch
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cpu_smi_handler
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get_sw_write_protect_state
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gpio_acpi_path
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init_timer
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mainboard_check_ec_image
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mainboard_io_trap_handler
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mainboard_post
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mainboard_smi_apmc
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mainboard_smi_gpi
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mainboard_smi_sleep
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map_oprom_vendev
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platform_prog_run
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platform_segment_loaded
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save_chromeos_gpios
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stage_cache_add
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stage_cache_load_stage
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timestamp_get
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tsc_freq_mhz
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vb2ex_hwcrypto_digest_extend
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vb2ex_hwcrypto_digest_finalize
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vb2ex_hwcrypto_digest_init
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vboot_platform_prepare_reboot
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verstage_mainboard_init
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@@ -1,20 +0,0 @@
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arch_segment_loaded
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backup_top_of_ram
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boot_device_init
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car_mainboard_post_console_init
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car_mainboard_pre_console_init
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car_soc_post_console_init
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car_soc_pre_console_init
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mainboard_check_ec_image
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mainboard_post
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platform_prog_run
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platform_segment_loaded
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stage_cache_add
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stage_cache_load_stage
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timestamp_get
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tsc_freq_mhz
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vb2ex_hwcrypto_digest_extend
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vb2ex_hwcrypto_digest_finalize
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vb2ex_hwcrypto_digest_init
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vboot_platform_prepare_reboot
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verstage_mainboard_init
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