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southbridge/intel/i82801gx: Fix problems found by checkpatch.pl

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Change-Id: Iddc67e7c126ce19429afc24b021e385353564cb8
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/18705
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Arthur Heymans
2017-03-09 12:02:52 +01:00
committed by Martin Roth
parent 70a8e34853
commit 3f111b0b11
16 changed files with 323 additions and 197 deletions
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6
src/southbridge/intel/i82801gx/early_lpc.c
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@@ -38,15 +38,15 @@ int southbridge_detect_s3_resume(void)
reg32 = inl(DEFAULT_PMBASE + 0x04);
printk(BIOS_DEBUG, "PM1_CNT: %08x\n", reg32);
if (((reg32 >> 10) & 7) == 5) {
if (acpi_s3_resume_allowed()) {
if (!acpi_s3_resume_allowed()) {
printk(BIOS_DEBUG, "Resume from S3 detected, but disabled.\n");
} else {
printk(BIOS_DEBUG, "Resume from S3 detected.\n");
/* Clear SLP_TYPE. This will break stage2 but
* we care for that when we get there.
*/
outl(reg32 & ~(7 << 10), DEFAULT_PMBASE + 0x04);
return 1;
} else {
printk(BIOS_DEBUG, "Resume from S3 detected, but disabled.\n");
}
}