soc/amd/*/include/msr: add version number to SERIAL_VID_* define names

Picasso and Cezanne use the serial voltage ID 2 standard to communicate
the CPU voltage to the voltage regulator module on the mainboard, while
Mendocino, Phoenix and Glinda use the serial voltage ID 3 standard for
this. Both standards encode the voltage in a different way, so add the
serial VID version number to the defines to clarify for which version
the define is.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I8ddab8df27c86dc2c70a6dfb47908d9405d86240
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73994
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>

src/soc/amd/glinda/acpi.c

@@ -127,8 +127,8 @@ uint32_t get_pstate_core_power(union pstate_msr pstate_reg)
 		/* Voltage off for VID code 0x00 */
 		voltage_in_uvolts = 0;
 	} else {
-		voltage_in_uvolts =
-			SERIAL_VID_BASE_MICROVOLTS + (SERIAL_VID_DECODE_MICROVOLTS * core_vid);
+		voltage_in_uvolts = SERIAL_VID_3_BASE_MICROVOLTS +
+					(SERIAL_VID_3_DECODE_MICROVOLTS * core_vid);
 	}
 
 	/* Power in mW */