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soc/intel/alderlake: Add Alder Lake P IGD device IDs

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This patch adds additional IGD device IDs as per document 638514.

BUG=b:216420554
TEST=coreboot is able to probe the IGD device during PCI enumeration.

Change-Id: I0cafe92581c454da5e4aeafd7ad52f0e65370b11
Signed-off-by: Kane Chen <kane.chen@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61441
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kane Chen
2022-01-28 13:58:21 +08:00
committed by Subrata Banik
parent 38c7314137
commit 3f8bff7764
3 changed files with 9 additions and 0 deletions
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3
src/include/device/pci_ids.h
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@@ -3902,6 +3902,9 @@
#define PCI_DEVICE_ID_INTEL_ADL_P_GT2_4 0x46a8
#define PCI_DEVICE_ID_INTEL_ADL_P_GT2_5 0x46b3
#define PCI_DEVICE_ID_INTEL_ADL_P_GT2_6 0x46a6
#define PCI_DEVICE_ID_INTEL_ADL_P_GT2_7 0x4628
#define PCI_DEVICE_ID_INTEL_ADL_P_GT2_8 0x46b1
#define PCI_DEVICE_ID_INTEL_ADL_P_GT2_9 0x4626
#define PCI_DEVICE_ID_INTEL_ADL_S_GT1 0x4680
#define PCI_DEVICE_ID_INTEL_ADL_M_GT1 0x46c0
#define PCI_DEVICE_ID_INTEL_ADL_M_GT2 0x46aa