mb/google/brox/var/lotso: Update devicetree setting
Based on schematics NB7228A_LOTSO_INTEL_MB_PROTO_20240521A_BOM.pdf update devicetree settings. BUG=b:333494257 TEST=emerge-brox coreboot chromeos-bootimage and boot on Change-Id: Ic9a7a9062f5c6e45c5bd9617f3b2a0634b8dc1db Signed-off-by: Jian Tong <tongjian@huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83051 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Shelley Chen <shchen@google.com> Reviewed-by: Subrata Banik <subratabanik@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Jian Tong
Subrata Banik
@@ -1,14 +1,378 @@
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fw_config
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field STORAGE 0 1
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field RETIMER 0 1
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option RETIMER_UNKNOWN 0
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option RETIMER_BYPASS 1
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option RETIMER_JHL8040 2
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end
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field STORAGE 2 3
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option STORAGE_UNKNOWN 0
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option STORAGE_UFS 1
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option STORAGE_NVME 2
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end
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field WIFI_BT 4 4
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option WIFI_CNVI_WIFI6E 0
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option WIFI_PCIE_WIFI7 1
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end
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field AUDIO 5 7
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option AUDIO_UNKNOWN 0
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option AUDIO_REALTEK_ALC256 1
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option AUDIO_REALTEK_ALC3287 2
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end
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field UFC 8 9
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option UFC_NONE 0
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option UFC_USB 1
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end
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field KB_BL 10 10
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option KB_BL_ABSENT 0
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option KB_BL_PRESENT 1
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end
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field ISH 21
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option ISH_DISABLE 0
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option ISH_ENABLE 1
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end
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end
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chip soc/intel/alderlake
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register "usb2_ports[0]" = "USB2_PORT_EMPTY" # Disable USB2 Port
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register "usb2_ports[1]" = "USB2_PORT_MID(OC2)" # Type-A Port A0
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register "usb2_ports[2]" = "USB2_PORT_MID(OC1)" # Type-A Port A1
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register "usb2_ports[4]" = "USB2_PORT_EMPTY" # Disable USB2 Port
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register "usb2_ports[6]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C0
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register "usb2_ports[7]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C1
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register "usb2_ports[8]" = "USB2_PORT_EMPTY" # Disable USB2 Port
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register "usb3_ports[0]" = "USB3_PORT_EMPTY" # Disable USB3 Port
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register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC2)" # Type-A Port A0
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register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC1)" # Type A port A1
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register "tcss_ports[0]" = "TCSS_PORT_EMPTY" # Disable TCP0
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register "tcss_ports[2]" = "TCSS_PORT_EMPTY" # Disable TCP2
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register "serial_io_gspi_mode" = "{
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[PchSerialIoIndexGSPI0] = PchSerialIoPci,
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[PchSerialIoIndexGSPI1] = PchSerialIoPci,
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}"
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register "power_limits_config[RPL_P_282_242_142_15W_CORE]" = "{
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.tdp_pl1_override = 15,
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.tdp_pl2_override = 40,
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.tdp_pl4 = 57,
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}"
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device domain 0 on
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end
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device ref dtt on
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chip drivers/intel/dptf
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## sensor information
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register "options.tsr[0].desc" = ""DRAM_SOC""
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register "options.tsr[1].desc" = ""Fan-Inlet""
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# TODO: below values are initial reference values only
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## Active Policy
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register "policies.active" = "{
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[0] = {
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.target = DPTF_TEMP_SENSOR_1,
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.thresholds = {
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TEMP_PCT(85, 90),
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TEMP_PCT(80, 80),
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TEMP_PCT(75, 70),
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TEMP_PCT(70, 60),
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TEMP_PCT(65, 50),
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TEMP_PCT(60, 40),
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}
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}
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}"
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## Passive Policy
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register "policies.passive" = "{
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[0] = DPTF_PASSIVE(CPU, CPU, 97, 5000),
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[1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 85, 5000),
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[2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_1, 85, 5000),
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}"
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## Critical Policy
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register "policies.critical" = "{
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[0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
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[1] = DPTF_CRITICAL(TEMP_SENSOR_0, 95, SHUTDOWN),
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[2] = DPTF_CRITICAL(TEMP_SENSOR_1, 95, SHUTDOWN),
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}"
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register "controls.power_limits" = "{
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.pl1 = {
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.min_power = 15000,
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.max_power = 15000,
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.time_window_min = 28 * MSECS_PER_SEC,
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.time_window_max = 32 * MSECS_PER_SEC,
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.granularity = 200,
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},
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.pl2 = {
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.min_power = 55000,
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.max_power = 55000,
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.time_window_min = 28 * MSECS_PER_SEC,
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.time_window_max = 32 * MSECS_PER_SEC,
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.granularity = 1000,
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}
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}"
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## Charger Performance Control (Control, mA)
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register "controls.charger_perf" = "{
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[0] = { 255, 1700 },
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[1] = { 24, 1500 },
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[2] = { 16, 1000 },
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[3] = { 8, 500 }
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}"
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## Fan Performance Control (Percent, Speed, Noise, Power)
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register "controls.fan_perf" = "{
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[0] = { 90, 6700, 220, 2200, },
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[1] = { 80, 5800, 180, 1800, },
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[2] = { 70, 5000, 145, 1450, },
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[3] = { 60, 4900, 115, 1150, },
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[4] = { 50, 3838, 90, 900, },
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[5] = { 40, 2904, 55, 550, },
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[6] = { 30, 2337, 30, 300, },
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[7] = { 20, 1608, 15, 150, },
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[8] = { 10, 800, 10, 100, },
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[9] = { 0, 0, 0, 50, }
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}"
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## Fan options
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register "options.fan.fine_grained_control" = "1"
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register "options.fan.step_size" = "2"
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device generic 0 alias dptf_policy on end
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end
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end # DTT
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device ref igpu on
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chip drivers/gfx/generic
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register "device_count" = "6"
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# DDIA for eDP
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register "device[0].name" = ""LCD0""
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register "device[0].type" = "panel"
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# DDIB for HDMI
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# If HDMI is not enumerated in the kernel, then no GFX device should be added for DDIB
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register "device[1].name" = ""DD01""
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# TCP0 (DP-1) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP0
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register "device[2].name" = ""DD02""
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# TCP1 (DP-2) for port C1
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register "device[3].name" = ""DD03""
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register "device[2].use_pld" = "true"
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register "device[2].pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
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# TCP2 (DP-3) for port C2
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register "device[4].name" = ""DD04""
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register "device[4].use_pld" = "true"
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register "device[4].pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(2, 1))"
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# TCP3 (DP-4) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP3
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register "device[5].name" = ""DD05""
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device generic 0 on end
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end
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end # Integrated Graphics Device
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device ref gspi0 on
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chip drivers/spi/acpi
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register "name" = ""CRFP""
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register "hid" = "ACPI_DT_NAMESPACE_HID"
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register "uid" = "1"
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register "compat_string" = ""google,cros-ec-spi""
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register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_E18_IRQ)"
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register "wake" = "GPE0_DW2_18"
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register "has_power_resource" = "1"
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register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E21)"
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register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E20)"
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register "enable_delay_ms" = "3"
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device spi 0 on end
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end # FPMCU
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end
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device ref pmc hidden
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chip drivers/intel/pmc_mux
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device generic 0 on
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chip drivers/intel/pmc_mux/conn
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use usb2_port7 as usb2_port
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use tcss_usb3_port1 as usb3_port
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device generic 0 alias conn0 on end
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end
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chip drivers/intel/pmc_mux/conn
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use usb2_port8 as usb2_port
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use tcss_usb3_port2 as usb3_port
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device generic 1 alias conn1 on end
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end
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end
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end
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end
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device ref tcss_xhci on
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chip drivers/usb/acpi
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device ref tcss_root_hub on
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chip drivers/usb/acpi
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register "desc" = ""USB3 Type-C Port C0 (MLB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "use_custom_pld" = "true"
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register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
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device ref tcss_usb3_port1 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB3 Type-C Port C1 (MLB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "use_custom_pld" = "true"
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register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(2, 1))"
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device ref tcss_usb3_port2 on end
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end
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end
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end
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end
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device ref xhci on
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chip drivers/usb/acpi
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device ref xhci_root_hub on
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chip drivers/usb/acpi
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register "desc" = ""USB2 Type-C Port C0 (MLB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "use_custom_pld" = "true"
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register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
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device ref usb2_port7 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 Type-C Port C1 (MLB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "use_custom_pld" = "true"
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register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(2, 1))"
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device ref usb2_port8 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 Camera""
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register "type" = "UPC_TYPE_INTERNAL"
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register "has_power_resource" = "1"
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register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E7)"
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device ref usb2_port6 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 Type-A Port A0 (DB)""
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register "type" = "UPC_TYPE_A"
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register "use_custom_pld" = "true"
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register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(3, 1))"
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device ref usb2_port2 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 Type-A Port A1 (DB)""
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register "type" = "UPC_TYPE_A"
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register "use_custom_pld" = "true"
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register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(4, 1))"
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device ref usb2_port3 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 Bluetooth""
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register "type" = "UPC_TYPE_INTERNAL"
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register "has_power_resource" = "1"
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register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A13)"
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device ref usb2_port10 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB3 Type-A Port A0 (DB)""
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register "type" = "UPC_TYPE_USB3_A"
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register "use_custom_pld" = "true"
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register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(4, 1))"
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device ref usb3_port2 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB3 Type-A Port A1 (DB)""
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register "type" = "UPC_TYPE_USB3_A"
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register "use_custom_pld" = "true"
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register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))"
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device ref usb3_port3 on end
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end
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end
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end
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end
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device ref pcie4_0 on
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# Enable CPU PCIE RP 1 using CLK 0
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register "cpu_pcie_rp[CPU_RP(1)]" = "{
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.clk_req = 0,
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.clk_src = 0,
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.flags = PCIE_RP_LTR | PCIE_RP_AER,
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}"
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probe STORAGE STORAGE_UNKNOWN
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probe STORAGE STORAGE_NVME
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end
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device ref pcie_rp5 on
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register "pch_pcie_rp[PCH_RP(5)]" = "{
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.clk_src = 2,
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.clk_req = 2,
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.flags = PCIE_RP_LTR | PCIE_RP_AER,
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}"
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chip drivers/wifi/generic
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register "wake" = "GPE0_DW0_03"
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register "add_acpi_dma_property" = "true"
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device pci 00.0 on end
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end
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chip soc/intel/common/block/pcie/rtd3
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# enable_gpio is controlled by the EC with EC_EN_PP3300_WLAN
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register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H2)"
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register "srcclk_pin" = "2"
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device generic 0 on end
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end
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probe WIFI_BT WIFI_PCIE_WIFI7
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end
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device ref pcie_rp6 on
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# Enable SD Card PCIE6 rp6 using clk 3
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register "pch_pcie_rp[PCH_RP(6)]" = "{
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.clk_src = 3,
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.clk_req = 3,
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.flags = PCIE_RP_HOTPLUG | PCIE_RP_LTR | PCIE_RP_AER,
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}"
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chip soc/intel/common/block/pcie/rtd3
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register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E7)"
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register "enable_delay_ms" = "1"
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register "srcclk_pin" = "3"
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device generic 0 on end
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end
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end
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device ref cnvi_wifi on
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chip drivers/wifi/generic
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register "wake" = "GPE0_PME_B0"
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register "add_acpi_dma_property" = "true"
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register "enable_cnvi_ddr_rfim" = "true"
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device generic 0 on end
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end
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probe WIFI_BT WIFI_CNVI_WIFI6E
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end
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device ref ish on
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chip drivers/intel/ish
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device generic 0 alias ish_conf on end
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end
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probe STORAGE STORAGE_UNKNOWN
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probe STORAGE STORAGE_UFS
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end
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device ref ufs on
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probe STORAGE STORAGE_UNKNOWN
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probe STORAGE STORAGE_UFS
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end
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device ref i2c0 on
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chip drivers/i2c/generic
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register "hid" = ""ELAN0000""
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register "desc" = ""ELAN Touchpad""
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register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_E3_IRQ)"
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register "wake" = "GPE0_DW2_03"
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register "detect" = "1"
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device i2c 0x15 on end
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end
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chip drivers/i2c/hid
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register "generic.hid" = ""FTCS0038""
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register "generic.cid" = ""PNP0C50""
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register "generic.desc" = ""Focal Touchpad""
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register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_E3_IRQ)"
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register "generic.wake" = "GPE0_DW2_03"
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register "generic.detect" = "1"
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register "hid_desc_reg_offset" = "0x20"
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device i2c 0x38 on end
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end
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end #I2C0
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device ref gspi1 on
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chip drivers/spi/acpi
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register "name" = ""GTP0""
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register "hid" = ""GXTS7986""
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register "uid" = "0x3"
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register "irq" = "ACPI_IRQ_WAKE_EDGE_LOW(GPP_F18_IRQ)"
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register "speed" = "10 * MHz"
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register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F17)"
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register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_F7)"
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device spi 0 on end
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end # touchscreen
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end
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end
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end
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