soc/amd/stoneyridge: Normalize GPIO init

This makes the flow for GPIO initialization more closely follow that
what is performed for other boards so that it's easier to read the flow
(and stops relying on BS_WRITE_TABLES).

BUG=b:72875858
TEST=Built and booted grunt, built gardenia.

Change-Id: Ic97db96581a69798b193a6bdeb93644f6a74fc9d
Signed-off-by: Justin TerAvest <teravest@chromium.org>
Reviewed-on: https://review.coreboot.org/23679
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Justin TerAvest
2018-02-14 19:10:15 -07:00
committed by Aaron Durbin
parent 5b131e27c5
commit 3fe3f0409c
13 changed files with 109 additions and 42 deletions

View File

@@ -155,15 +155,13 @@ const struct irq_idx_name *sb_get_apic_reg_association(size_t *size)
return irq_association;
}
void sb_program_gpio(void)
void sb_program_gpios(const struct soc_amd_stoneyridge_gpio *gpio_ptr,
size_t size)
{
void *tmp_ptr;
const struct soc_amd_stoneyridge_gpio *gpio_ptr;
size_t size;
uint8_t control, mux, index;
printk(BIOS_SPEW, "GPIO programming stage %s\n", STR_GPIO_STAGE);
gpio_ptr = board_get_gpio(&size);
for (index = 0; index < size; index++) {
mux = gpio_ptr[index].function;
control = gpio_ptr[index].control;
@@ -181,14 +179,6 @@ void sb_program_gpio(void)
printk(BIOS_SPEW, "End GPIO programming\n");
}
static void sb_program_gpio_ram(void *unused)
{
sb_program_gpio();
}
BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY,
sb_program_gpio_ram, NULL);
/**
* @brief Find the size of a particular wide IO
*