soc/intel/*: drop UART pad configuration from common code

UART pad configuration should not be done in common code, because that
may cause short circuits, when the user sets a wrong UART index.

Since all boards do pad setup on their own now, finally drop the pad
configuration from SoC common code.

Change-Id: Id03719eb8bd0414083148471ed05dea62a895126
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48829
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lance Zhao
This commit is contained in:
Michael Niewöhner
2020-12-21 03:46:58 +01:00
parent 2b5892256c
commit 405f229689
13 changed files with 61 additions and 332 deletions

View File

@@ -16,7 +16,8 @@ typedef u32 pci_devfn_t;
(((DEV) & 0x1F) << 15) | \
(((FN) & 0x07) << 12))
#define PCI_DEV_INVALID (0xffffffffU)
#define PCI_DEV_INVALID (0xffffffffU)
#define PCI_DEVFN_INVALID (0xffffffffU)
#if 1
/* FIXME: For most of the time in ramstage, we get valid device pointer