skylake: FAB3 Adding Support for various SPD.

This pach enables memory configuration based on PCH_MEM_CFG
and EC_BRD_ID.

BRANCH=None
BUG=chrome-os-partner:44087
CQ-DEPEND=CL:293832
TEST=Build and Boot FAB3 (Kunimitsu)

Original-Change-Id: I7999e609c4b0b3c89a9689ee6bb6b98c88703809
Original-Signed-off-by: pchandri <preetham.chandrian@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/293787
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>

Change-Id: I52a1af1683b74e5cad71b9e4861942a23869f255
Signed-off-by: pchandri <preetham.chandrian@intel.com>
Reviewed-on: http://review.coreboot.org/11284
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>

src/mainboard/intel/kunimitsu/boardid.h

@@ -0,0 +1,31 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013 Google Inc.
+ * Copyright (C) 2015 Intel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+#ifndef _BOARDID_H_
+#define _BOARDID_H_
+
+#define SCRD_SKU1	0x3
+#define SCRD_SKU2	0x4
+#define SCRD_SKU3	0x1
+#define SCRD_SKU4	0x2
+#define SCRD_SKU5	0x5
+#define SCRD_SKU6	0x6
+
+#endif