src: Move common IA-32 MSRs to <cpu/x86/msr.h>

Use "cpu/x86/msr.h" for common IA-32 MSRs and correct IA-32 MSRs names.

Change-Id: Ida7f2d608c55796abf9452f190a58802e498302d
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/28752
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Elyes HAOUAS
2018-10-01 08:47:51 +02:00
committed by Martin Roth
parent 603963e1ba
commit 419bfbc1f1
56 changed files with 129 additions and 264 deletions

View File

@@ -68,7 +68,7 @@ int get_turbo_state(void)
cpuid_regs = cpuid(CPUID_LEAF_PM);
turbo_cap = !!(cpuid_regs.eax & PM_CAP_TURBO_MODE);
msr = rdmsr(MSR_IA32_MISC_ENABLES);
msr = rdmsr(IA32_MISC_ENABLE);
turbo_en = !(msr.hi & H_MISC_DISABLE_TURBO);
if (!turbo_cap && turbo_en) {
@@ -97,9 +97,9 @@ void enable_turbo(void)
/* Only possible if turbo is available but hidden */
if (get_turbo_state() == TURBO_DISABLED) {
/* Clear Turbo Disable bit in Misc Enables */
msr = rdmsr(MSR_IA32_MISC_ENABLES);
msr = rdmsr(IA32_MISC_ENABLE);
msr.hi &= ~H_MISC_DISABLE_TURBO;
wrmsr(MSR_IA32_MISC_ENABLES, msr);
wrmsr(IA32_MISC_ENABLE, msr);
/* Update cached turbo state */
set_global_turbo_state(TURBO_ENABLED);
@@ -115,9 +115,9 @@ void disable_turbo(void)
msr_t msr;
/* Set Turbo Disable bit in Misc Enables */
msr = rdmsr(MSR_IA32_MISC_ENABLES);
msr = rdmsr(IA32_MISC_ENABLE);
msr.hi |= H_MISC_DISABLE_TURBO;
wrmsr(MSR_IA32_MISC_ENABLES, msr);
wrmsr(IA32_MISC_ENABLE, msr);
/* Update cached turbo state */
set_global_turbo_state(TURBO_UNAVAILABLE);