src: Move common IA-32 MSRs to <cpu/x86/msr.h>

Use "cpu/x86/msr.h" for common IA-32 MSRs and correct IA-32 MSRs names.

Change-Id: Ida7f2d608c55796abf9452f190a58802e498302d
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/28752
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/include/cpu/intel/l2_cache.h

@@ -27,7 +27,6 @@
 #ifndef __P6_L2_CACHE_H
 #define __P6_L2_CACHE_H
 
-#define IA32_PLATFORM_ID	0x17
 #define EBL_CR_POWERON	0x2A
 
 #define BBL_CR_D0	0x88

src/include/cpu/intel/speedstep.h

@@ -35,11 +35,7 @@
 
 
 /* Speedstep related MSRs */
-#define IA32_PLATFORM_ID  0x017
-#define IA32_PERF_STATUS  0x198
-#define IA32_PERF_CTL     0x199
-#define MSR_THERM2_CTL    0x19D
-#define IA32_MISC_ENABLES 0x1A0
+#define MSR_THERM2_CTL		0x19D
 #define MSR_EBC_FREQUENCY_ID	0x2c
 #define MSR_FSB_FREQ		0xcd
 #define MSR_FSB_CLOCK_VCC	0xce

src/include/cpu/intel/turbo.h

@@ -20,7 +20,6 @@
 #define CPUID_LEAF_PM		6
 #define PM_CAP_TURBO_MODE	(1 << 1)
 
-#define MSR_IA32_MISC_ENABLES	0x1a0
 /* Disable the Monitor Mwait FSM feature */
 #define MONITOR_MWAIT_DIS_MASK	0x40000