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src: Move common IA-32 MSRs to <cpu/x86/msr.h>

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Use "cpu/x86/msr.h" for common IA-32 MSRs and correct IA-32 MSRs names.

Change-Id: Ida7f2d608c55796abf9452f190a58802e498302d
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/28752
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Elyes HAOUAS
2018-10-01 08:47:51 +02:00
committed by Martin Roth
parent 603963e1ba
commit 419bfbc1f1
56 changed files with 129 additions and 264 deletions
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8
src/northbridge/intel/nehalem/early_init.c
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@@ -110,11 +110,11 @@ static void early_cpu_init (void)
m.lo = (m.lo & ~0xff) | reg8;
wrmsr(IA32_PERF_CTL, m);
m = rdmsr(MSR_IA32_MISC_ENABLES);
m = rdmsr(IA32_MISC_ENABLE);
m.hi &= ~0x00000040;
m.lo |= 0x10000;
wrmsr(MSR_IA32_MISC_ENABLES, m);
wrmsr(IA32_MISC_ENABLE, m);
}
m = rdmsr(MSR_FSB_CLOCK_VCC);
@@ -124,9 +124,9 @@ static void early_cpu_init (void)
m.lo = (m.lo & ~0xff) | reg8;
wrmsr(IA32_PERF_CTL, m);
m = rdmsr(MSR_IA32_MISC_ENABLES);
m = rdmsr(IA32_MISC_ENABLE);
m.lo |= 0x10000;
wrmsr(MSR_IA32_MISC_ENABLES, m);
wrmsr(IA32_MISC_ENABLE, m);
}
void nehalem_early_initialization(int chipset_type)