diff --git a/src/mainboard/system76/gaze17/variants/3060/overridetree.cb b/src/mainboard/system76/gaze17/variants/3060/overridetree.cb index 944b35e19b..5c6029169d 100644 --- a/src/mainboard/system76/gaze17/variants/3060/overridetree.cb +++ b/src/mainboard/system76/gaze17/variants/3060/overridetree.cb @@ -14,12 +14,13 @@ chip soc/intel/alderlake .clk_req = 0, .flags = PCIE_RP_LTR, }" - chip soc/intel/common/block/pcie/rtd3 - register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D14)" # SATA_M2_PWR_EN2 - register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F20)" # M2_CPU_SSD1_RST# - register "srcclk_pin" = "0" # PEX4_SSD_CLKREQ# - device generic 0 on end - end + #chip soc/intel/common/block/pcie/rtd3 + # # XXX: Enable tied to 3.3VS? + # register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D14)" # SATA_M2_PWR_EN2 + # register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B13)" # BUF_PLT_RST# + # register "srcclk_pin" = "0" # PEX4_SSD_CLKREQ# + # device generic 0 on end + #end end device ref tbt_pcie_rp0 on end device ref tcss_dma0 on end @@ -46,7 +47,7 @@ chip soc/intel/alderlake }" chip soc/intel/common/block/pcie/rtd3 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E3)" # PCH_WLAN_EN - register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H2)" # M2_WLAN_RST# + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B13)" # BUF_PLT_RST# register "srcclk_pin" = "2" # WLAN_CLKREQ# device generic 0 on end end @@ -60,7 +61,7 @@ chip soc/intel/alderlake }" chip soc/intel/common/block/pcie/rtd3 # XXX: No enable_gpio = no D3cold? - register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F10)" # CARD_RTD3_RST# + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B13)" # BUF_PLT_RST# register "srcclk_pin" = "5" # CARD_CLKREQ# device generic 0 on end end @@ -83,8 +84,10 @@ chip soc/intel/alderlake .flags = PCIE_RP_LTR, }" chip soc/intel/common/block/pcie/rtd3 - register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C2)" # SATA_M2_PWR_EN1 - register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H0)" # M2_PCH_SSD_RST# + # XXX: Enable tied to 3.3VS? + #register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C2)" # SATA_M2_PWR_EN1 + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B13)" # BUF_PLT_RST# + register "disable_l23" = "true" # Fixes suspend on WD drives register "srcclk_pin" = "1" # SSD_CLKREQ# device generic 0 on end end