Replace ENV_RAMSTAGE with ENV_PAYLOAD_LOADER

This patch relying on new rule, ENV_PAYLOAD_LOADER which is set
to ENV_RAMSTAGE.

This approach will help to add future optimization (rampayload) in
coreboot flow if required.

Change-Id: Ib54ece7b9e5f281f8a092dc6f38c07406edfa5fa
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32725
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: ron minnich <rminnich@gmail.com>

src/soc/intel/common/block/fast_spi/fast_spi.c

@@ -249,7 +249,7 @@ void fast_spi_cache_bios_region(void)
 	bios_size = ALIGN_UP(bios_size, alignment);
 	base = 4ULL*GiB - bios_size;
 
-	if (ENV_RAMSTAGE) {
+	if (ENV_PAYLOAD_LOADER) {
 		mtrr_use_temp_range(base, bios_size, type);
 	} else {
 		int mtrr = get_free_var_mtrr();

src/soc/intel/common/block/i2c/i2c.c

@@ -47,7 +47,7 @@ uintptr_t dw_i2c_get_soc_early_base(unsigned int bus)
 	return EARLY_I2C_BASE(bus);
 }
 
-#if !ENV_RAMSTAGE
+#if !ENV_PAYLOAD_LOADER
 static int lpss_i2c_early_init_bus(unsigned int bus)
 {
 	const struct dw_i2c_bus_config *config;

src/soc/intel/common/block/lpc/lpc_lib.c

@@ -289,7 +289,7 @@ void pch_enable_lpc(void)
 	soc_get_gen_io_dec_range(dev, gen_io_dec);
 	lpc_set_gen_decode_range(gen_io_dec);
 	soc_setup_dmi_pcr_io_dec(gen_io_dec);
-	if (ENV_RAMSTAGE)
+	if (ENV_PAYLOAD_LOADER)
 		pch_lpc_interrupt_init();
 }