soc/intel/broadwell: implement RMRR ACPI table

Modeled after Skylake implementation; uses duplicated
intel common SA functions to get RMRR addresses

Test: build/boot purism/librem13v1, observe IOMMU fully functional
with intel_iommu=on kernel parameter

Change-Id: I1a10a4f91b787b72f33150031b783d426148c25d
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30234
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

src/soc/intel/broadwell/systemagent.c

@@ -36,6 +36,18 @@ u8 systemagent_revision(void)
 	return pci_read_config8(SA_DEV_ROOT, PCI_REVISION_ID);
 }
 
+uintptr_t sa_get_tolud_base(void)
+{
+	/* Bit 0 is lock bit, not part of address */
+	return pci_read_config32(SA_DEV_ROOT, TOLUD) & ~1;
+}
+
+uintptr_t sa_get_gsm_base(void)
+{
+	/* Bit 0 is lock bit, not part of address */
+	return pci_read_config32(SA_DEV_ROOT, BGSM) & ~1;
+}
+
 static int get_pcie_bar(struct device *dev, unsigned int index, u32 *base,
 			u32 *len)
 {