vc/mediatek/mt8195: Optimize DRAM init time by reducing I2C I/O

Disable reading of vdram/vddq/vmddr to reduce access of I2C
to reduce DRAM init time by about 30ms.
The values were only needed by HQA report and not needed on
production units.

BUG=b:195274787

Signed-off-by: Ryan Chuang <ryan.chuang@mediatek.corp-partner.google.com>
Change-Id: I32cd68fb8b52cec6e145d6772475fde0130ca6ac
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56850
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Ryan Chuang 2021-08-06 11:04:23 +08:00 committed by Hung-Te Lin
parent eb94a4a6de
commit 43a3aa0cf4

View File

@ -273,10 +273,12 @@ void vSetVcoreByFreq(DRAMC_CTX_T *p)
#ifndef DDR_INIT_TIME_PROFILING
print("Read voltage for %d, %d\n", p->frequency, vGet_Current_SRAMIdx(p));
print("Vcore = %d\n", dramc_get_vcore_voltage());
#ifdef FOR_HQA_REPORT_USED
print("Vdram = %d\n", dramc_get_vmdd_voltage(p->dram_type));
print("Vddq = %d\n", dramc_get_vmddq_voltage(p->dram_type));
print("Vmddr = %d\n", dramc_get_vmddr_voltage());
#endif
#endif
#endif
#endif