vc/mediatek/mt8195: Optimize DRAM init time by reducing I2C I/O
Disable reading of vdram/vddq/vmddr to reduce access of I2C to reduce DRAM init time by about 30ms. The values were only needed by HQA report and not needed on production units. BUG=b:195274787 Signed-off-by: Ryan Chuang <ryan.chuang@mediatek.corp-partner.google.com> Change-Id: I32cd68fb8b52cec6e145d6772475fde0130ca6ac Reviewed-on: https://review.coreboot.org/c/coreboot/+/56850 Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -273,10 +273,12 @@ void vSetVcoreByFreq(DRAMC_CTX_T *p)
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#ifndef DDR_INIT_TIME_PROFILING
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print("Read voltage for %d, %d\n", p->frequency, vGet_Current_SRAMIdx(p));
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print("Vcore = %d\n", dramc_get_vcore_voltage());
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#ifdef FOR_HQA_REPORT_USED
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print("Vdram = %d\n", dramc_get_vmdd_voltage(p->dram_type));
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print("Vddq = %d\n", dramc_get_vmddq_voltage(p->dram_type));
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print("Vmddr = %d\n", dramc_get_vmddr_voltage());
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#endif
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#endif
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#endif
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#endif
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