From 43fd0402265c0c1381fc3fcf04610ed9f2781f2f Mon Sep 17 00:00:00 2001 From: Bernardo Perez Priego Date: Tue, 22 Jun 2021 17:59:38 -0700 Subject: [PATCH] mb/intel/adlrvp_m: Enable TCSS USB ports device path This provide a more consistent mechanism to enable corresponding USB TCSS port. BUG=b:182960979 TEST=Boot device, Type C port should operate correctly. Signed-off-by: Bernardo Perez Priego Change-Id: Iadc0df2e6e19a5afacbb7db1ae0bc7546dbcdc1a Reviewed-on: https://review.coreboot.org/c/coreboot/+/55772 Reviewed-by: Tim Wawrzynczak Tested-by: build bot (Jenkins) --- src/mainboard/intel/adlrvp/devicetree_m.cb | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/src/mainboard/intel/adlrvp/devicetree_m.cb b/src/mainboard/intel/adlrvp/devicetree_m.cb index ae248429a9..0462a2bb8f 100644 --- a/src/mainboard/intel/adlrvp/devicetree_m.cb +++ b/src/mainboard/intel/adlrvp/devicetree_m.cb @@ -162,7 +162,21 @@ chip soc/intel/alderlake device ref pcie4_1 on end device ref tbt_pcie_rp0 on end device ref tbt_pcie_rp1 on end - device ref tcss_xhci on end + device ref tcss_xhci on + chip drivers/usb/acpi + register "type" = "UPC_TYPE_HUB" + device ref tcss_root_hub on + chip drivers/usb/acpi + register "desc" = ""TypeC Port 1"" + device ref tcss_usb3_port1 on end + end + chip drivers/usb/acpi + register "desc" = ""TypeC Port 2"" + device ref tcss_usb3_port2 on end + end + end + end + end device ref tcss_dma0 on end device ref xhci on chip drivers/usb/acpi