sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/system76/adl-p: galp6: Re-add CPU PCIe RTD3

Browse Source 
Tested with the following drives:

- Crucial P5 Plus (CT500P5PSSD8)
- Kingston KC3000 (SKC3000S/512G)
- Sabrent Rocket NVMe 4.0 (SB-ROCKET-NVMEe4-500)
- Samsung 970 EVO (MZ-V7E250)
- Samsung 970 EVO Plus (MZ-V7S250)
- Samsung 980 PRO (MZ-V8P2T0)
- WD Black SN850X (WDS100T2XD0E)
- WD Blue SN580 (WDS500G2B0C)
- WD Green SN350 (WDS240G2G0C)

Test:

- PCH asserts `SLP_S0#` during suspend (power LED blinks)
- `slp_s0_residency_usec` increases after suspend

Change-Id: I51eec89444cd0b7bc7834ee52c3b17ca0b3bf9ac
Signed-off-by: Tim Crawford <tcrawford@system76.com>
This commit is contained in:
Tim Crawford
2022-12-30 13:56:13 -07:00
committed by Tim Crawford
parent 0a440232f4
commit 4416e2bc7a
1 changed files with 6 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
src/mainboard/system76/adl-p/variants/galp6/overridetree.cb
View File

@ -20,6 +20,12 @@ chip soc/intel/alderlake
.clk_req = 0,
.flags = PCIE_RP_LTR,
}"
chip soc/intel/common/block/pcie/rtd3
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D14)" # SSD1_PWR_EN
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F20)" # M2_SSD1_RST#
register "srcclk_pin" = "0" # SSD1_CLKREQ#
device generic 0 on end
end
end
device ref tcss_xhci on
register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)"