sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

cpu/x86/mtrr: use lapicid instead of cpu_index calls

Browse Source 
The cpu_index function can't be used before mpinit, so use lapicid calls
instead. This fixes the regression introduced by commit 4c3749884d
("cpu/x86/mtrr: Print cpu index number when set up MTRRs for BSP/APs")
and also reverts also commit b3261661c7 ("cpu/x86/mtrr/mtrr: fix
printk format strings"), since lapicid returns an unsigned int while
cpu_index returns an unsigned long.

TEST=Mandolin boots again and doesn't fail when it first tries to print
the MTRR configuration

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I0d226704051ab171891775a618ce7897b74fde16
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70797
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
This commit is contained in:
Felix Held
2022-12-14 23:07:52 +01:00
committed by Martin L Roth
parent 2cf2bd8197
commit 447f5777aa
1 changed files with 6 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

11
src/cpu/x86/mtrr/mtrr.c
View File

@@ -15,6 +15,7 @@
#include <cpu/amd/mtrr.h> #include <cpu/amd/mtrr.h>
#include <cpu/cpu.h> #include <cpu/cpu.h>
#include <cpu/x86/cache.h> #include <cpu/x86/cache.h>
#include <cpu/x86/lapic.h>
#include <cpu/x86/msr.h> #include <cpu/x86/msr.h>
#include <cpu/x86/mtrr.h> #include <cpu/x86/mtrr.h>
#include <device/device.h> #include <device/device.h>
@@ -291,7 +292,7 @@ static void commit_fixed_mtrrs(void)
int j; int j;
int msr_num; int msr_num;
int type_index; int type_index;
unsigned long cpu_idx = cpu_index(); unsigned int cpu_idx = lapicid();
/* 8 ranges per msr. */ /* 8 ranges per msr. */
msr_t fixed_msrs[NUM_FIXED_MTRRS]; msr_t fixed_msrs[NUM_FIXED_MTRRS];
unsigned long msr_index[NUM_FIXED_MTRRS]; unsigned long msr_index[NUM_FIXED_MTRRS];
@@ -335,7 +336,7 @@ static void commit_fixed_mtrrs(void)
ASSERT(msr_num == NUM_FIXED_MTRRS) ASSERT(msr_num == NUM_FIXED_MTRRS)
for (i = 0; i < ARRAY_SIZE(fixed_msrs); i++) for (i = 0; i < ARRAY_SIZE(fixed_msrs); i++)
printk(BIOS_DEBUG, "CPU 0x%lx: MTRR: Fixed MSR 0x%lx 0x%08x%08x\n", printk(BIOS_DEBUG, "apic_id 0x%x: MTRR: Fixed MSR 0x%lx 0x%08x%08x\n",
cpu_idx, msr_index[i], fixed_msrs[i].hi, fixed_msrs[i].lo); cpu_idx, msr_index[i], fixed_msrs[i].hi, fixed_msrs[i].lo);
disable_cache(); disable_cache();
@@ -355,7 +356,7 @@ void x86_setup_fixed_mtrrs(void)
{ {
x86_setup_fixed_mtrrs_no_enable(); x86_setup_fixed_mtrrs_no_enable();
printk(BIOS_SPEW, "CPU 0x%lx call enable_fixed_mtrr()\n", cpu_index()); printk(BIOS_SPEW, "apic_id 0x%x call enable_fixed_mtrr()\n", lapicid());
enable_fixed_mtrr(); enable_fixed_mtrr();
} }
@@ -807,8 +808,8 @@ static void _x86_setup_mtrrs(unsigned int above4gb)
x86_setup_fixed_mtrrs(); x86_setup_fixed_mtrrs();
address_size = cpu_phys_address_size(); address_size = cpu_phys_address_size();
printk(BIOS_DEBUG, "CPU 0x%lx setup mtrr for CPU physical address size: %d bits\n", printk(BIOS_DEBUG, "apic_id 0x%x setup mtrr for CPU physical address size: %d bits\n",
cpu_index(), address_size); lapicid(), address_size);
x86_setup_var_mtrrs(address_size, above4gb); x86_setup_var_mtrrs(address_size, above4gb);
} }