sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

src: Use "foo *bar" instead of "foo* bar"

Browse Source 
Change-Id: Ib2bb6cc80ac2bdc389c60c7ffac4bba937f0fca8
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26461
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Elyes HAOUAS 2018-05-22 12:51:27 +02:00 committed by Patrick Georgi
parent 7154ef2fe1
commit 448d9fb431
17 changed files with 41 additions and 37 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
src/mainboard/asus/kfsn4-dre/romstage.c
View File

@ -118,7 +118,8 @@ static const unsigned int ctrl_conf_enable_msi_mapping[] = {
RES_PCI_IO, PCI_ADDR(0, 0, 0, 0xe0), ~(0x00000000), 0x00010000, /* Enable MSI mapping on host bridge -- without this Linux cannot use the network device MSI interrupts! */ RES_PCI_IO, PCI_ADDR(0, 0, 0, 0xe0), ~(0x00000000), 0x00010000, /* Enable MSI mapping on host bridge -- without this Linux cannot use the network device MSI interrupts! */
}; };
static void ck804_control(const unsigned int* values, u32 size, uint8_t bus_unit_id) static void ck804_control(const unsigned int *values, u32 size,
uint8_t bus_unit_id)
{ {
unsigned busn[4], io_base[4]; unsigned busn[4], io_base[4];
int i, ck804_num = 0; int i, ck804_num = 0;

6
src/northbridge/amd/amdfam10/northbridge.c
View File

@ -1040,7 +1040,8 @@ static void amdfam10_domain_scan_bus(struct device *dev)
} }
#if IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLES) #if IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLES)
static int amdfam10_get_smbios_data16(int* count, int handle, unsigned long *current) static int amdfam10_get_smbios_data16(int *count, int handle,
unsigned long *current)
{ {
struct amdmct_memory_info *mem_info; struct amdmct_memory_info *mem_info;
mem_info = cbmem_find(CBMEM_ID_AMDMCT_MEMINFO); mem_info = cbmem_find(CBMEM_ID_AMDMCT_MEMINFO);
@ -1145,7 +1146,8 @@ static uint16_t amdmct_mct_speed_enum_to_mhz(uint8_t speed)
} }
} }
static int amdfam10_get_smbios_data17(int* count, int handle, int parent_handle, unsigned long *current) static int amdfam10_get_smbios_data17(int *count, int handle, int parent_handle,
unsigned long *current)
{ {
struct amdmct_memory_info *mem_info; struct amdmct_memory_info *mem_info;
mem_info = cbmem_find(CBMEM_ID_AMDMCT_MEMINFO); mem_info = cbmem_find(CBMEM_ID_AMDMCT_MEMINFO);

3
src/soc/nvidia/tegra210/include/soc/clock.h
View File

@ -433,7 +433,8 @@ void clock_disable_regs(u32 bits[DEV_CONFIG_BLOCKS]);
void clock_set_reset_regs(u32 bits[DEV_CONFIG_BLOCKS]); void clock_set_reset_regs(u32 bits[DEV_CONFIG_BLOCKS]);
void clock_clr_reset_regs(u32 bits[DEV_CONFIG_BLOCKS]); void clock_clr_reset_regs(u32 bits[DEV_CONFIG_BLOCKS]);
void clock_enable_clear_reset(u32 l, u32 h, u32 u, u32 v, u32 w, u32 x, u32 y); void clock_enable_clear_reset(u32 l, u32 h, u32 u, u32 v, u32 w, u32 x, u32 y);
void clock_grp_enable_clear_reset(u32 val, u32* clk_enb_set_reg, u32* rst_dev_clr_reg); void clock_grp_enable_clear_reset(u32 val, u32 *clk_enb_set_reg,
u32 *rst_dev_clr_reg);
void clock_reset_l(u32 l); void clock_reset_l(u32 l);
void clock_reset_h(u32 h); void clock_reset_h(u32 h);
void clock_reset_u(u32 u); void clock_reset_u(u32 u);