cpu/x86/tsc: Deduplicate Makefile logic

The code under `cpu/x86/tsc` is only compiled in when its `Makefile.inc`
is included from platform (CPU/SoC) code and the `UDELAY_TSC` Kconfig
option is enabled.

Include `cpu/x86/tsc/Makefile.inc` once from `cpu/x86/Makefile.inc` and
drop the now-redundant inclusions from platform code. Also, deduplicate
the `UDELAY_TSC` guards.

Change-Id: I41e96026f37f19de954fd5985b92a08cb97876c1
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57456
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/intel/alderlake/Makefile.inc

@@ -4,7 +4,6 @@ subdirs-y += ../../../cpu/intel/microcode
 subdirs-y += ../../../cpu/intel/turbo
 subdirs-y += ../../../cpu/x86/lapic
 subdirs-y += ../../../cpu/x86/mtrr
-subdirs-y += ../../../cpu/x86/tsc
 
 # all (bootblock, verstage, romstage, postcar, ramstage)
 all-y += gspi.c

src/soc/intel/apollolake/Makefile.inc

@@ -5,7 +5,6 @@ subdirs-y += ../../../cpu/intel/microcode
 subdirs-y += ../../../cpu/intel/turbo
 subdirs-y += ../../../cpu/x86/lapic
 subdirs-y += ../../../cpu/x86/mtrr
-subdirs-y += ../../../cpu/x86/tsc
 subdirs-y += ../../../cpu/x86/cache
 
 bootblock-y += bootblock/bootblock.c

src/soc/intel/baytrail/Makefile.inc

@@ -3,7 +3,6 @@ ifeq ($(CONFIG_SOC_INTEL_BAYTRAIL),y)
 subdirs-y += romstage
 subdirs-y += ../../../cpu/x86/lapic
 subdirs-y += ../../../cpu/x86/mtrr
-subdirs-y += ../../../cpu/x86/tsc
 subdirs-y += ../../../cpu/intel/microcode
 subdirs-y += ../../../cpu/intel/turbo
 subdirs-y += ../../../cpu/intel/common

src/soc/intel/braswell/Makefile.inc

@@ -3,7 +3,6 @@ ifeq ($(CONFIG_SOC_INTEL_BRASWELL),y)
 subdirs-y += romstage
 subdirs-y += ../../../cpu/x86/lapic
 subdirs-y += ../../../cpu/x86/mtrr
-subdirs-y += ../../../cpu/x86/tsc
 subdirs-y += ../../../cpu/intel/microcode
 subdirs-y += ../../../cpu/intel/turbo
 subdirs-y += ../../../cpu/intel/common

src/soc/intel/cannonlake/Makefile.inc

@@ -5,7 +5,6 @@ subdirs-y += ../../../cpu/intel/microcode
 subdirs-y += ../../../cpu/intel/turbo
 subdirs-y += ../../../cpu/x86/lapic
 subdirs-y += ../../../cpu/x86/mtrr
-subdirs-y += ../../../cpu/x86/tsc
 subdirs-y += ../../../cpu/intel/common
 
 bootblock-y += bootblock/bootblock.c

src/soc/intel/denverton_ns/Makefile.inc

@@ -6,7 +6,6 @@ subdirs-y += ../../../cpu/intel/microcode
 subdirs-y += ../../../cpu/intel/turbo
 subdirs-y += ../../../cpu/x86/lapic
 subdirs-y += ../../../cpu/x86/mtrr
-subdirs-y += ../../../cpu/x86/tsc
 subdirs-y += ../../../cpu/x86/cache
 
 bootblock-y += bootblock/bootblock.c

src/soc/intel/elkhartlake/Makefile.inc

@@ -5,7 +5,6 @@ subdirs-y += ../../../cpu/intel/microcode
 subdirs-y += ../../../cpu/intel/turbo
 subdirs-y += ../../../cpu/x86/lapic
 subdirs-y += ../../../cpu/x86/mtrr
-subdirs-y += ../../../cpu/x86/tsc
 
 # all (bootblock, verstage, romstage, postcar, ramstage)
 all-y += gspi.c

src/soc/intel/icelake/Makefile.inc

@@ -5,7 +5,6 @@ subdirs-y += ../../../cpu/intel/microcode
 subdirs-y += ../../../cpu/intel/turbo
 subdirs-y += ../../../cpu/x86/lapic
 subdirs-y += ../../../cpu/x86/mtrr
-subdirs-y += ../../../cpu/x86/tsc
 
 # all (bootblock, verstage, romstage, postcar, ramstage)
 all-y += gspi.c

src/soc/intel/jasperlake/Makefile.inc

@@ -5,7 +5,6 @@ subdirs-y += ../../../cpu/intel/microcode
 subdirs-y += ../../../cpu/intel/turbo
 subdirs-y += ../../../cpu/x86/lapic
 subdirs-y += ../../../cpu/x86/mtrr
-subdirs-y += ../../../cpu/x86/tsc
 
 # all (bootblock, verstage, romstage, postcar, ramstage)
 all-y += gspi.c

src/soc/intel/quark/Makefile.inc

@@ -4,7 +4,6 @@ ifeq ($(CONFIG_SOC_INTEL_QUARK),y)
 
 subdirs-y += romstage
 subdirs-y += ../../../cpu/x86/mtrr
-subdirs-y += ../../../cpu/x86/tsc
 
 bootblock-y += bootblock/esram_init.S
 bootblock-y += bootblock/bootblock.c

src/soc/intel/skylake/Makefile.inc

@@ -7,7 +7,6 @@ subdirs-y += ../../../cpu/intel/microcode
 subdirs-y += ../../../cpu/intel/turbo
 subdirs-y += ../../../cpu/x86/lapic
 subdirs-y += ../../../cpu/x86/mtrr
-subdirs-y += ../../../cpu/x86/tsc
 
 bootblock-y += bootblock/bootblock.c
 bootblock-y += i2c.c

src/soc/intel/tigerlake/Makefile.inc

@@ -5,7 +5,6 @@ subdirs-y += ../../../cpu/intel/microcode
 subdirs-y += ../../../cpu/intel/turbo
 subdirs-y += ../../../cpu/x86/lapic
 subdirs-y += ../../../cpu/x86/mtrr
-subdirs-y += ../../../cpu/x86/tsc
 
 # all (bootblock, verstage, romstage, postcar, ramstage)
 all-y += gspi.c

src/soc/intel/xeon_sp/cpx/Makefile.inc

@@ -5,7 +5,6 @@ ifeq ($(CONFIG_SOC_INTEL_COOPERLAKE_SP),y)
 subdirs-y += ../../../../cpu/intel/turbo
 subdirs-y += ../../../../cpu/x86/lapic
 subdirs-y += ../../../../cpu/x86/mtrr
-subdirs-y += ../../../../cpu/x86/tsc
 subdirs-y += ../../../../cpu/intel/microcode
 
 romstage-y += romstage.c ddr.c

src/soc/intel/xeon_sp/skx/Makefile.inc

@@ -6,7 +6,6 @@ subdirs-y += ../../../../cpu/intel/microcode
 subdirs-y += ../../../../cpu/intel/turbo
 subdirs-y += ../../../../cpu/x86/lapic
 subdirs-y += ../../../../cpu/x86/mtrr
-subdirs-y += ../../../../cpu/x86/tsc
 subdirs-y += ../../../../cpu/x86/cache
 
 postcar-y += soc_util.c