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inteltool: Show more info on sandy/ivy.

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Change-Id: I408614e743ab6f0f447b327c01d8f4dacf787124
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/6692
Tested-by: build bot (Jenkins)
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
This commit is contained in:
Vladimir Serbinenko
2014-08-16 19:14:02 +02:00
parent ab83ef02c7
commit 44bc11c3eb
4 changed files with 396 additions and 2 deletions
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13
util/inteltool/memory.c
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@ -214,6 +214,7 @@ int print_mchbar(struct pci_dev *nb, struct pci_access *pacc)
mchbar_phys = pci_read_long(nb, 0x48);
mchbar_phys |= ((uint64_t)pci_read_long(nb, 0x4c)) << 32;
mchbar_phys &= 0x0000007fffff8000UL; /* 38:15 */
size = 32768;
break;
default:
printf("Error: Dumping MCHBAR on this northbridge is not (yet) supported.\n");
@ -240,9 +241,19 @@ int print_mchbar(struct pci_dev *nb, struct pci_access *pacc)
printf("0x%04x: 0x%08"PRIx32"\n", i, *(uint32_t *)(mchbar+i));
}
if (nb->device_id == PCI_DEVICE_ID_INTEL_CORE_1ST_GEN) {
switch (nb->device_id)
{
case PCI_DEVICE_ID_INTEL_CORE_1ST_GEN:
printf ("clock_speed_index = %x\n", read_500 (0,0x609, 6) >> 1);
dump_timings ();
break;
case PCI_DEVICE_ID_INTEL_CORE_3RD_GEN_A:
case PCI_DEVICE_ID_INTEL_CORE_3RD_GEN_B:
case PCI_DEVICE_ID_INTEL_CORE_3RD_GEN_C:
case PCI_DEVICE_ID_INTEL_CORE_3RD_GEN_D:
case PCI_DEVICE_ID_INTEL_CORE_2ND_GEN:
ivybridge_dump_timings();
break;
}
unmap_physical((void *)mchbar, size);
return 0;