mb/system76/gaze17: reduce diff with mb/system76/adl

Change-Id: Iabb5486576a2c71af58e4abf3e870ff87af60895

src/mainboard/system76/gaze17/Kconfig

@@ -27,12 +27,18 @@ config BOARD_SPECIFIC_OPTIONS
 	select SOC_INTEL_CRASHLOG
 	select SPD_READ_BY_WORD
 	select SYSTEM_TYPE_LAPTOP
-	select TPM_MEASURED_BOOT
 	select TPM_RDRESP_NEED_DELAY
 
 config MAINBOARD_DIR
 	default "system76/gaze17"
 
+config VARIANT_DIR
+	default "3050" if BOARD_SYSTEM76_GAZE17_3050
+	default "3060" if BOARD_SYSTEM76_GAZE17_3060_B
+
+config OVERRIDE_DEVICETREE
+	default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
+
 config MAINBOARD_PART_NUMBER
 	default "gaze17-3050" if BOARD_SYSTEM76_GAZE17_3050
 	default "gaze17-3060-b" if BOARD_SYSTEM76_GAZE17_3060_B
@@ -44,13 +50,6 @@ config MAINBOARD_VERSION
 	default "gaze17-3050" if BOARD_SYSTEM76_GAZE17_3050
 	default "gaze17-3060-b" if BOARD_SYSTEM76_GAZE17_3060_B
 
-config VARIANT_DIR
-	default "3050" if BOARD_SYSTEM76_GAZE17_3050
-	default "3060" if BOARD_SYSTEM76_GAZE17_3060_B
-
-config OVERRIDE_DEVICETREE
-	default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
-
 config CONSOLE_POST
 	default y
 
@@ -66,6 +65,9 @@ config ONBOARD_VGA_IS_PRIMARY
 config POST_DEVICE
 	default n
 
+config TPM_MEASURED_BOOT
+	default y
+
 config UART_FOR_CONSOLE
 	default 0
 

src/mainboard/system76/gaze17/Makefile.inc

@@ -1,5 +1,6 @@
 ## SPDX-License-Identifier: GPL-2.0-only
 
+CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/include
 CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include
 
 bootblock-y += bootblock.c
@@ -8,5 +9,5 @@ bootblock-y += variants/$(VARIANT_DIR)/gpio_early.c
 romstage-y += romstage.c
 
 ramstage-y += ramstage.c
-ramstage-y += variants/$(VARIANT_DIR)/gpio.c
 ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c
+ramstage-y += variants/$(VARIANT_DIR)/gpio.c

src/mainboard/system76/gaze17/acpi/mainboard.asl

@@ -1,6 +1,8 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
+#if CONFIG(DRIVERS_GFX_NVIDIA)
 #include <variant/gpio.h>
+#endif
 
 #define EC_GPE_SCI 0x6E
 #define EC_GPE_SWI 0x6B
@@ -10,8 +12,11 @@ Scope (\_SB) {
 	#include "sleep.asl"
 	Scope (PCI0) {
 		#include "backlight.asl"
+
+#if CONFIG(DRIVERS_GFX_NVIDIA)
 		Scope (PEG2) {
 			#include <drivers/gfx/nvidia/acpi/tigerlake.asl>
 		}
+#endif
 	}
 }

src/mainboard/system76/gaze17/bootblock.c

@@ -1,9 +1,9 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <bootblock_common.h>
-#include <variant/gpio.h>
+#include <mainboard/gpio.h>
 
-void bootblock_mainboard_init(void)
+void bootblock_mainboard_early_init(void)
 {
-	variant_configure_early_gpios();
+	mainboard_configure_early_gpios();
 }

src/mainboard/system76/gaze17/include/mainboard/gpio.h

@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef MAINBOARD_GPIO_H
+#define MAINBOARD_GPIO_H
+
+void mainboard_configure_early_gpios(void);
+void mainboard_configure_gpios(void);
+
+#endif

src/mainboard/system76/gaze17/ramstage.c

@@ -1,8 +1,8 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <smbios.h>
+#include <mainboard/gpio.h>
 #include <soc/ramstage.h>
-#include <variant/gpio.h>
+#include <smbios.h>
 
 smbios_wakeup_type smbios_system_wakeup_type(void)
 {
@@ -22,5 +22,14 @@ void mainboard_silicon_init_params(FSP_S_CONFIG *params)
 	params->SataPortDevSlpPinMux[0] = 0x59673e0c; // GPP_H12
 	params->SataPortDevSlpPinMux[1] = 0x5967400d; // GPP_H13
 
-	variant_configure_gpios();
+	params->SataPortsSolidStateDrive[1] = 1;
 }
+
+static void mainboard_init(void *chip_info)
+{
+	mainboard_configure_gpios();
+}
+
+struct chip_operations mainboard_ops = {
+	.init = mainboard_init,
+};

src/mainboard/system76/gaze17/variants/3050/gpio.c

@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
+#include <mainboard/gpio.h>
 #include <soc/gpio.h>
-#include <variant/gpio.h>
 
 static const struct pad_config gpio_table[] = {
 	/* ------- GPIO Group GPD ------- */
@@ -221,7 +221,7 @@ static const struct pad_config gpio_table[] = {
 	PAD_NC(GPP_T3, NONE),
 };
 
-void variant_configure_gpios(void)
+void mainboard_configure_gpios(void)
 {
 	gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
 }

src/mainboard/system76/gaze17/variants/3050/gpio_early.c

@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <variant/gpio.h>
+#include <mainboard/gpio.h>
 #include <soc/gpio.h>
 
 static const struct pad_config early_gpio_table[] = {
@@ -10,7 +10,7 @@ static const struct pad_config early_gpio_table[] = {
 	PAD_CFG_NF(GPP_H11, NONE, DEEP, NF1), // UART0_TX
 };
 
-void variant_configure_early_gpios(void)
+void mainboard_configure_early_gpios(void)
 {
 	gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));
 }

src/mainboard/system76/gaze17/variants/3050/include/variant/gpio.h

@@ -10,9 +10,4 @@
 #define DGPU_GC6	GPP_F13
 #define DGPU_SSID	0x866d1558
 
-#ifndef __ACPI__
-void variant_configure_early_gpios(void);
-void variant_configure_gpios(void);
-#endif
-
 #endif

src/mainboard/system76/gaze17/variants/3060/gpio.c

@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
+#include <mainboard/gpio.h>
 #include <soc/gpio.h>
-#include <variant/gpio.h>
 
 static const struct pad_config gpio_table[] = {
 	/* ------- GPIO Group GPD ------- */
@@ -221,7 +221,7 @@ static const struct pad_config gpio_table[] = {
 	PAD_NC(GPP_T3, NONE),
 };
 
-void variant_configure_gpios(void)
+void mainboard_configure_gpios(void)
 {
 	gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
 }

src/mainboard/system76/gaze17/variants/3060/gpio_early.c

@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <variant/gpio.h>
+#include <mainboard/gpio.h>
 #include <soc/gpio.h>
 
 static const struct pad_config early_gpio_table[] = {
@@ -8,7 +8,7 @@ static const struct pad_config early_gpio_table[] = {
 	PAD_CFG_GPO(GPP_B2, 0, DEEP), // DGPU_RST#_PCH
 };
 
-void variant_configure_early_gpios(void)
+void mainboard_configure_early_gpios(void)
 {
 	gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));
 }

src/mainboard/system76/gaze17/variants/3060/include/variant/gpio.h

@@ -10,9 +10,4 @@
 #define DGPU_GC6	GPP_F13
 #define DGPU_SSID	0x867c1558
 
-#ifndef __ACPI__
-void variant_configure_early_gpios(void);
-void variant_configure_gpios(void);
-#endif
-
 #endif