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soc/intel/skylake: Unify serial IRQ options

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We had two ways to configure the serial IRQ mode. One time in the
devicetree for FSP and one time through Kconfig for coreboot. We'll
use `enum serirq_mode` from soc/intel/common/ as a devicetree option
instead. As the default is `quiet mode` here and that is the most
common mode, this saves us a lot of lines.

In four cases kblrvp8, 11 and librem 13v2, 15v3, we had conflicting
settings in devicetree and Kconfig. We'll maintain the `continuous`
selection, although it might be that coreboot overrode this earlier
on the kblrvps.

Note: A lot of Google boards have serial IRQ enabled, while the pin
seems to be unconnected?

Change-Id: I79f0cd302e335d8dcf8bf6bc32f3d40ca6713e5c
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/31596
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Nico Huber
2019-02-23 19:24:51 +01:00
committed by Patrick Georgi
parent ff79341a80
commit 44e89af6e6
30 changed files with 22 additions and 52 deletions
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9
src/soc/intel/skylake/chip.h
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@ -24,6 +24,7 @@
#include <drivers/i2c/designware/dw_i2c.h>
#include <intelblocks/chip.h>
#include <intelblocks/gspi.h>
#include <intelblocks/lpc_lib.h>
#include <stdint.h>
#include <soc/gpe.h>
#include <soc/gpio.h>
@ -428,13 +429,7 @@ struct soc_intel_skylake_config {
RESET_POWER_CYCLE_4S = 4,
} PmConfigPwrCycDur;
/* Determines if enable Serial IRQ. Values 0: Disabled, 1: Enabled.*/
u8 SerialIrqConfigSirqEnable;
enum {
SERIAL_IRQ_QUIET_MODE = 0,
SERIAL_IRQ_CONTINUOUS_MODE = 1,
} SerialIrqConfigSirqMode;
enum serirq_mode serirq_mode;
enum {
SERIAL_IRQ_FRAME_PULSE_4CLK = 0,