AMD K8 boards’ romstage.c: Spell sync*hr*onize correctly

Change-Id: I92e6e7f1292f66642aa0336064a4eccba104dd08
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/5101
Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)

src/mainboard/gigabyte/ga_2761gxdk/romstage.c

@@ -192,7 +192,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
         //do we need apci timer, tsc...., only debug need it for better output
         /* all ap stopped? */
-//        init_timer(); // Need to use TMICT to synconize FID/VID
+//        init_timer(); // Need to use TMICT to synchronize FID/VID
 
         sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
 

src/mainboard/gigabyte/m57sli/romstage.c

@@ -181,7 +181,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         }
 #endif
 
-	init_timer(); // Need to use TMICT to synconize FID/VID
+	init_timer(); // Need to use TMICT to synchronize FID/VID
 
         needs_reset |= optimize_link_coherent_ht();
         needs_reset |= optimize_link_incoherent_ht(sysinfo);