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soc/intel/alderlake: Update the VccIn Aux Imon IccMax for ADL

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This patch updates the VccIn Aux Imon IccMax for ADL-P to SOC SKU
specific values from the FSP default value 160.
* ADL-P 682(45W) = 137.
* ADL-P 482(28W) = 128.
* ADL-P 282(15W) = 128.

These config values are generated iPDG application with ADL-P platform
package tool and supports 15W/28W/45W SKU's.
RDC Kit ID for the iPDG tools,
* Intel(R) Platform Design Studio Installer: 610905.
* Intel(R) Platform Design Studio - Platform ADL-P (Partial): 627345.
* Intel(R) Platform Design Studio - Platform ADL-P (Full): 630261.

BUG=b:195033556

Signed-off-by: V Sowmya <v.sowmya@intel.com>
Change-Id: I6c159035cba781d3661a0a0cef16f9591a583912
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56176
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
V Sowmya
2021-07-09 22:11:04 +05:30
committed by Tim Wawrzynczak
parent d5d25558bc
commit 458708fc30
1 changed files with 34 additions and 0 deletions
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34
src/soc/intel/alderlake/fsp_params.c
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@@ -5,6 +5,7 @@
#include <console/console.h> #include <console/console.h>
#include <device/device.h> #include <device/device.h>
#include <device/pci.h> #include <device/pci.h>
#include <device/pci_ids.h>
#include <fsp/api.h> #include <fsp/api.h>
#include <fsp/ppi/mp_service_ppi.h> #include <fsp/ppi/mp_service_ppi.h>
#include <fsp/util.h> #include <fsp/util.h>
@@ -33,6 +34,12 @@
#define DEF_DMVAL 15 #define DEF_DMVAL 15
#define DEF_DITOVAL 625 #define DEF_DITOVAL 625
/* VccIn Aux Imon IccMax values in mA */
#define MILLIAMPS_TO_AMPS 1000
#define ICC_MAX_ID_ADL_P_3_MA 34250
#define ICC_MAX_ID_ADL_P_5_MA 32000
#define ICC_MAX_ID_ADL_P_7_MA 32000
/* /*
* ME End of Post configuration * ME End of Post configuration
* 0 - Disable EOP. * 0 - Disable EOP.
@@ -280,6 +287,30 @@ static int get_l1_substate_control(enum L1_substates_control ctl)
return ctl - 1; return ctl - 1;
} }
/* This function returns the VccIn Aux Imon IccMax values for ADL-P SKU's */
static uint16_t get_vccin_aux_imon_iccmax(void)
{
uint16_t mch_id = 0;
if (!mch_id) {
struct device *dev = pcidev_path_on_root(SA_DEVFN_ROOT);
mch_id = dev ? pci_read_config16(dev, PCI_DEVICE_ID) : 0xffff;
}
switch (mch_id) {
case PCI_DEVICE_ID_INTEL_ADL_P_ID_3:
return ICC_MAX_ID_ADL_P_3_MA;
case PCI_DEVICE_ID_INTEL_ADL_P_ID_5:
return ICC_MAX_ID_ADL_P_5_MA;
case PCI_DEVICE_ID_INTEL_ADL_P_ID_7:
return ICC_MAX_ID_ADL_P_7_MA;
default:
printk(BIOS_ERR, "Unknown MCH ID: 0x%4x, skipping VccInAuxImonIccMax config\n",
mch_id);
return 0;
}
}
__weak void mainboard_update_soc_chip_config(struct soc_intel_alderlake_config *config) __weak void mainboard_update_soc_chip_config(struct soc_intel_alderlake_config *config)
{ {
/* Override settings per board. */ /* Override settings per board. */
@@ -581,6 +612,9 @@ static void fill_fsps_misc_power_params(FSP_S_CONFIG *s_cfg,
/* Enable the energy efficient turbo mode */ /* Enable the energy efficient turbo mode */
s_cfg->EnergyEfficientTurbo = 1; s_cfg->EnergyEfficientTurbo = 1;
s_cfg->PkgCStateLimit = LIMIT_AUTO; s_cfg->PkgCStateLimit = LIMIT_AUTO;
/* VccIn Aux Imon IccMax. Values are in 1/4 Amp increments and range is 0-512. */
s_cfg->VccInAuxImonIccImax = get_vccin_aux_imon_iccmax() * 4 / MILLIAMPS_TO_AMPS;
} }
static void fill_fsps_irq_params(FSP_S_CONFIG *s_cfg, static void fill_fsps_irq_params(FSP_S_CONFIG *s_cfg,