add cpureginit to romcc code.

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2249 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Ronald G. Minnich
2006-04-10 16:40:19 +00:00
parent 526b2c429e
commit 45f6c5e3d4
5 changed files with 16 additions and 32 deletions

View File

@@ -69,11 +69,11 @@
#define GL0_DF 6
#define GL1_GLIU0 1
#define GL1_GLCP 3
#define GL1_GLCP 3
#define GL1_PCI 4
#define GL1_FG 5
#define GL1_VIP 5
#define GL1_AES 6
#define GL1_VIP 5
#define GL1_AES 6
#define MSR_GLIU0 (GL0_GLIU0 << 29) + (1 << 28) /* To get on GeodeLink one bit has to be set */
#define MSR_MC (GL0_MC << 29)