device/pci_ops: Have only default PCI bus ops available

In the current state of the tree we do not utilise the
mechanism of having per-device overrides for PCI bus
ops.

This change effectively inlines all PCI config accessors
for ramstage as well.

Change-Id: I11c37cadfcbef8fb5657dec6d620e6bccab311a4
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31753
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Kyösti Mälkki
2019-03-07 14:18:28 +02:00
parent 34cf5619f9
commit 4663f45caa
9 changed files with 7 additions and 133 deletions

View File

@@ -17,7 +17,6 @@
struct device;
struct pci_operations;
struct pci_bus_operations;
struct i2c_bus_operations;
struct smbus_bus_operations;
struct pnp_mode_ops;

View File

@@ -22,6 +22,7 @@
#include <device/pci_def.h>
#include <device/resource.h>
#include <device/device.h>
#include <device/pci_ops.h>
#include <device/pci_rom.h>
#include <device/pci_type.h>
@@ -33,19 +34,6 @@ struct pci_operations {
void (*set_L1_ss_latency)(struct device *dev, unsigned int off);
};
/* Common pci bus operations */
struct pci_bus_operations {
uint8_t (*read8)(pci_devfn_t dev, uint16_t reg);
uint16_t (*read16)(pci_devfn_t dev, uint16_t reg);
uint32_t (*read32)(pci_devfn_t dev, uint16_t reg);
void (*write8)(pci_devfn_t dev, uint16_t reg, uint8_t val);
void (*write16)(pci_devfn_t dev, uint16_t reg, uint16_t val);
void (*write32)(pci_devfn_t dev, uint16_t reg, uint32_t val);
};
// FIXME: Needs complete pci_bus_operations
#include <device/pci_ops.h>
struct pci_driver {
const struct device_operations *ops;
unsigned short vendor;

View File

@@ -39,13 +39,6 @@
#include <device/pci.h>
const struct pci_bus_operations *pci_bus_default_ops(void);
static __always_inline const struct pci_bus_operations *pci_bus_ops(void)
{
return pci_bus_default_ops();
}
void __noreturn pcidev_die(void);
static __always_inline pci_devfn_t pcidev_bdf(const struct device *dev)
@@ -63,43 +56,37 @@ static __always_inline pci_devfn_t pcidev_assert(const struct device *dev)
static __always_inline
u8 pci_read_config8(const struct device *dev, u16 reg)
{
pci_devfn_t bdf = PCI_BDF(dev);
return pci_bus_ops()->read8(bdf, reg);
return pci_s_read_config8(PCI_BDF(dev), reg);
}
static __always_inline
u16 pci_read_config16(const struct device *dev, u16 reg)
{
pci_devfn_t bdf = PCI_BDF(dev);
return pci_bus_ops()->read16(bdf, reg);
return pci_s_read_config16(PCI_BDF(dev), reg);
}
static __always_inline
u32 pci_read_config32(const struct device *dev, u16 reg)
{
pci_devfn_t bdf = PCI_BDF(dev);
return pci_bus_ops()->read32(bdf, reg);
return pci_s_read_config32(PCI_BDF(dev), reg);
}
static __always_inline
void pci_write_config8(const struct device *dev, u16 reg, u8 val)
{
pci_devfn_t bdf = PCI_BDF(dev);
pci_bus_ops()->write8(bdf, reg, val);
pci_s_write_config8(PCI_BDF(dev), reg, val);
}
static __always_inline
void pci_write_config16(const struct device *dev, u16 reg, u16 val)
{
pci_devfn_t bdf = PCI_BDF(dev);
pci_bus_ops()->write16(bdf, reg, val);
pci_s_write_config16(PCI_BDF(dev), reg, val);
}
static __always_inline
void pci_write_config32(const struct device *dev, u16 reg, u32 val)
{
pci_devfn_t bdf = PCI_BDF(dev);
pci_bus_ops()->write32(bdf, reg, val);
pci_s_write_config32(PCI_BDF(dev), reg, val);
}
#endif