soc/intel/skylake: Add new Northbridge and IGD IDs

This patch adds support
1) Intel(R) Xeon(R) E3 - 1200/1500 v5/6th Gen Intel(R) Core(TM) Host
Bridge/DRAM Registers - 191F;
2) HD Graphics 530 Skylake GT2 - Intel integrated graphics processor
https://en.wikichip.org/wiki/intel/hd_graphics/530.

This is required to run coreboot on the Intel Core i5-6600 (Skylake)
desktop processor. It has been tested on ASRock H110M-DVS motherboard.

Change-Id: If47e9ac32813a9f73d3a23f44536f60d1003971d
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31601
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Maxim Polyakov
2019-02-25 10:46:18 +03:00
committed by Patrick Georgi
parent 9126169419
commit 46e6852062
4 changed files with 6 additions and 0 deletions

View File

@@ -2996,6 +2996,7 @@
/* Intel IGD device Ids */
#define PCI_DEVICE_ID_INTEL_SKL_GT1_SULTM 0x1906
#define PCI_DEVICE_ID_INTEL_SKL_GT2_DT2P1 0x1912
#define PCI_DEVICE_ID_INTEL_SKL_GT2_SULXM 0x191E
#define PCI_DEVICE_ID_INTEL_SKL_GT2_SULTM 0x1916
#define PCI_DEVICE_ID_INTEL_SKL_GT2_SHALM 0x191B
@@ -3069,6 +3070,7 @@
#define PCI_DEVICE_ID_INTEL_SKL_ID_H 0x1910
#define PCI_DEVICE_ID_INTEL_KBL_ID_S 0x590f
#define PCI_DEVICE_ID_INTEL_SKL_ID_H_EM 0x1918
#define PCI_DEVICE_ID_INTEL_SKL_ID_DT 0x191f
#define PCI_DEVICE_ID_INTEL_KBL_ID_U 0x5904
#define PCI_DEVICE_ID_INTEL_KBL_ID_Y 0x590c
#define PCI_DEVICE_ID_INTEL_KBL_ID_H 0x5910