dptf: Add support for Charger Performance States

This change generates the DPTF TCHG.PPSS table in the SSDT. This table
describes different charging rates which are available to use. DPTF
can pick different rates in order to passively cool (or not) the
system.

BUG=b:143539650
TEST=compiles

Change-Id: I6df6bfbac628fa4e4d313e38b8e6c53fce70a7f2
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41888
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
This commit is contained in:
Tim Wawrzynczak
2020-05-29 14:29:53 -06:00
committed by Patrick Georgi
parent 3a9cde9ab6
commit 46f6fcf88f
4 changed files with 65 additions and 0 deletions

View File

@@ -72,6 +72,9 @@ static void dptf_fill_ssdt(const struct device *dev)
dptf_write_critical_policies(config->policies.critical,
DPTF_MAX_CRITICAL_POLICIES);
/* Controls */
dptf_write_charger_perf(config->controls.charger_perf, DPTF_MAX_CHARGER_PERF_STATES);
printk(BIOS_INFO, "\\_SB.DPTF: %s at %s\n", dev->chip_ops->name, dev_path(dev));
}