Remove whitespace.

Fix issues reported by new lint test.

Change-Id: I077a829cb4a855cbb3b71b6eb5c66b2068be6def
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/646
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

src/cpu/amd/agesa/family12/Kconfig

@@ -61,9 +61,9 @@ config XIP_ROM_SIZE
 	hex
 	default 0x80000
 	depends on CPU_AMD_AGESA_FAMILY12
-	
+
 config HAVE_INIT_TIMER
 	bool
 	default y
-	depends on CPU_AMD_AGESA_FAMILY12 
-		
+	depends on CPU_AMD_AGESA_FAMILY12
+

src/cpu/amd/agesa/family12/Makefile.inc

@@ -2,7 +2,7 @@
 #
 # Copyright (c) 2011, Advanced Micro Devices, Inc.
 # All rights reserved.
-# 
+#
 # Redistribution and use in source and binary forms, with or without
 # modification, are permitted provided that the following conditions are met:
 #     * Redistributions of source code must retain the above copyright
@@ -10,10 +10,10 @@
 #     * Redistributions in binary form must reproduce the above copyright
 #       notice, this list of conditions and the following disclaimer in the
 #       documentation and/or other materials provided with the distribution.
-#     * Neither the name of Advanced Micro Devices, Inc. nor the names of 
-#       its contributors may be used to endorse or promote products derived 
+#     * Neither the name of Advanced Micro Devices, Inc. nor the names of
+#       its contributors may be used to endorse or promote products derived
 #       from this software without specific prior written permission.
-# 
+#
 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
 # ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 # WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -24,9 +24,9 @@
 # ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 # SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-# 
+#
 #*****************************************************************************
- 
+
 ramstage-y += chip_name.c
 driver-y += model_12_init.c
 

src/cpu/amd/car/cache_as_ram.inc

@@ -146,7 +146,7 @@ CAR_FAM10_out:
    #elif (CONFIG_MMCONF_BUS_NUMBER == 2)
 	orl	$(1 << 2), %eax
    #elif (CONFIG_MMCONF_BUS_NUMBER == 4)
-	orl	$(2 << 2), %eax	
+	orl	$(2 << 2), %eax
    #elif (CONFIG_MMCONF_BUS_NUMBER == 8)
 	orl	$(3 << 2), %eax
    #elif (CONFIG_MMCONF_BUS_NUMBER == 16)

src/cpu/via/car/cache_as_ram.inc

@@ -182,7 +182,7 @@ clear_fixed_var_mtrr_out:
 	movl	%eax, %esp
 
 #ifdef CARTEST
-testok:	
+testok:
 	post_code(0x40)
 	xorl	%edx, %edx
 	xorl	%eax, %eax

src/cpu/x86/32bit/entry32.inc

@@ -6,8 +6,8 @@
 	.code32
 
 
-	/* This is the GDT for the ROM stage part of coreboot. It 
-	 * is different from the RAM stage GDT which is defined in 
+	/* This is the GDT for the ROM stage part of coreboot. It
+	 * is different from the RAM stage GDT which is defined in
 	 * c_start.S
 	 */