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google/rambi: add explicit pull-down for ram-id

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Some variants need the internal pull resistor on GPIO_SSUS_40
set explicitly to pull down rather than disabling the pull,
in order for the ram-id to be read correctly via GPIO.

Correct this by adding a function to enable and set the internal pull
and define its use as needed in the board's variant.h.

Chromium source:
branch: firmware-gnawty-5216.239.B
/src/soc/intel/baytrail/baytrail/gpio.h#418
/src/mainboard/google/gnawty/romstage.c#60

Test: boot 4GB Candy board and observe correct RAM id, amount detected

Change-Id: I8823c27385f4422184b5afa57f6048f7ff2a25ab
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/18309
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Matt DeVillier
2017-02-07 22:07:56 -06:00
committed by Nico Huber
parent d81078d944
commit 474a7c51ce
5 changed files with 15 additions and 1 deletions
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7
src/soc/intel/baytrail/include/soc/gpio.h
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@@ -454,4 +454,11 @@ static inline void ssus_disable_internal_pull(int pad)
write32(ssus_pconf0(pad), read32(ssus_pconf0(pad)) & pull_mask);
}
static inline void ssus_enable_internal_pull(int pad, int mask)
{
const int pull_mask = ~(0xf << 7);
write32(ssus_pconf0(pad),
(read32(ssus_pconf0(pad)) & pull_mask) | mask);
}
#endif /* _BAYTRAIL_GPIO_H_ */