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cpu/x86: Link entry32.inc

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Change-Id: Ib475f40f950f8cc54f0e3c50a80970ba3d2b628f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47969
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Kyösti Mälkki
2020-11-22 00:55:31 +02:00
parent 404c0c455c
commit 47d58e5df0
4 changed files with 30 additions and 38 deletions
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33
src/cpu/x86/32bit/entry32.inc
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@@ -1,33 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* For starting coreboot in protected mode */
#include <arch/rom_segs.h>
#include <cpu/x86/post_code.h>
.code32
/*
* When we come here we are in protected mode.
* NOTE aligned to 4 so that we are sure that the prefetch
* cache will be reloaded.
*/
.align 4
.globl __protected_start
__protected_start:
/* Save the BIST value */
movl %eax, %ebp
#if !CONFIG(NO_EARLY_BOOTBLOCK_POSTCODES)
post_code(POST_ENTER_PROTECTED_MODE)
#endif
movw $ROM_DATA_SEG, %ax
movw %ax, %ds
movw %ax, %es
movw %ax, %ss
movw %ax, %fs
movw %ax, %gs
/* Restore the BIST value to %eax */
movl %ebp, %eax

1
src/cpu/x86/Makefile.inc
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@@ -8,6 +8,7 @@ ramstage-y += backup_default_smm.c
subdirs-$(CONFIG_CPU_INTEL_COMMON_SMM) += ../intel/smm
bootblock-y += entry32.S
bootblock-y += entry16.S
bootblock-y += reset16.S

79
src/cpu/x86/entry32.S Normal file
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@@ -0,0 +1,79 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/* For starting coreboot in protected mode */
/*
* This is the modern bootblock. It prepares the system for C environment runtime
* setup. The actual setup is done by hardware-specific code.
*
* It provides a bootflow similar to other architectures, and thus is considered
* to be the modern approach.
*
*/
#include <arch/rom_segs.h>
#include <cpu/x86/cr.h>
#include <cpu/x86/post_code.h>
.section .init, "ax", @progbits
.code32
/*
* When we come here we are in protected mode.
* NOTE aligned to 4 so that we are sure that the prefetch
* cache will be reloaded.
*/
.align 4
.globl __protected_start
__protected_start:
/* Save the BIST value */
movl %eax, %ebp
#if !CONFIG(NO_EARLY_BOOTBLOCK_POSTCODES)
post_code(POST_ENTER_PROTECTED_MODE)
#endif
movw $ROM_DATA_SEG, %ax
movw %ax, %ds
movw %ax, %es
movw %ax, %ss
movw %ax, %fs
movw %ax, %gs
/* Restore the BIST value to %eax */
movl %ebp, %eax
#if CONFIG(BOOTBLOCK_DEBUG_SPINLOOP)
/* Wait for a JTAG debugger to break in and set EBX non-zero */
xor %ebx, %ebx
debug_spinloop:
cmp $0, %ebx
jz debug_spinloop
#endif
bootblock_protected_mode_entry:
#if !CONFIG(USE_MARCH_586)
/* MMX registers required here */
/* BIST result in eax */
movd %eax, %mm0
/* Get an early timestamp */
rdtsc
movd %eax, %mm1
movd %edx, %mm2
#endif
#if CONFIG(SSE)
enable_sse:
mov %cr4, %eax
or $CR4_OSFXSR, %ax
mov %eax, %cr4
#endif /* CONFIG(SSE) */
/* We're done. Now it's up to platform-specific code */
jmp bootblock_pre_c_entry