soc/intel/xeon_sp: Drop code to locate the UBOX bus

Drop the code to retrieve the UBOX bus numbers. Only keep
a minial function that works when called from socket0 to retrieve
the bus for UBOX(1).

Change-Id: I2b18f02f62b69ec7c73cd5665102cb6bfc6e64b5
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80102
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shuo Liu <shuo.liu@intel.com>

src/mainboard/ocp/deltalake/ramstage.c

@@ -195,7 +195,7 @@ static int create_smbios_type9(int *handle, unsigned long *current)
 		printk(BIOS_ERR, "Failed to get IPMI PCIe config\n");
 
 	for (index = 0; index < ARRAY_SIZE(stack_busnos); index++)
-		stack_busnos[index] = get_stack_busno(index);
+		stack_busnos[index] = socket0_get_ubox_busno(index);
 
 	for (index = 0; index < ARRAY_SIZE(slotinfo); index++) {
 		uint8_t characteristics_1 = 0;

src/soc/intel/xeon_sp/cpx/include/soc/soc_util.h

@@ -24,9 +24,8 @@
 
 const struct SystemMemoryMapHob *get_system_memory_map(void);
 
-uint8_t get_stack_busno(const uint8_t stack);
+uint8_t socket0_get_ubox_busno(const uint8_t stack);
 uint32_t get_socket_stack_busno(uint32_t socket, uint32_t stack);
-uint32_t get_socket_ubox_busno(uint32_t socket);
 uint8_t get_cxl_node_count(void);
 
 int soc_get_stack_for_port(int port);

src/soc/intel/xeon_sp/cpx/soc_util.c

@@ -35,7 +35,8 @@ bool is_ubox_stack_res(const STACK_RES *res)
 	return res->Personality == TYPE_UBOX;
 }
 
-uint8_t get_stack_busno(const uint8_t stack)
+/* Returns the UBOX(stack) bus number when called from socket0 */
+uint8_t socket0_get_ubox_busno(const uint8_t stack)
 {
 	if (stack >= MAX_IIO_STACK) {
 		printk(BIOS_ERR, "%s: Stack %u does not exist!\n", __func__, stack);
@@ -55,14 +56,6 @@ uint32_t get_socket_stack_busno(uint32_t socket, uint32_t stack)
 	return hob->PlatformData.IIO_resource[socket].StackRes[stack].BusBase;
 }
 
-uint32_t get_socket_ubox_busno(uint32_t socket)
-{
-	if (socket == 0)
-		return get_stack_busno(PCU_IIO_STACK);
-
-	return get_socket_stack_busno(socket, PCU_IIO_STACK);
-}
-
 /*
  * EX: CPX-SP
  * Ports    Stack   Stack(HOB)  IioConfigIou

src/soc/intel/xeon_sp/skx/include/soc/soc_util.h

@@ -10,9 +10,8 @@ void config_reset_cpl3_csrs(void);
 
 const struct SystemMemoryMapHob *get_system_memory_map(void);
 
-uint8_t get_stack_busno(const uint8_t stack);
+uint8_t socket0_get_ubox_busno(const uint8_t stack);
 uint32_t get_socket_stack_busno(uint32_t socket, uint32_t stack);
-uint32_t get_socket_ubox_busno(uint32_t socket);
 
 int soc_get_stack_for_port(int port);
 uint8_t get_cxl_node_count(void);

src/soc/intel/xeon_sp/skx/soc_util.c

@@ -84,7 +84,8 @@ bool is_ubox_stack_res(const STACK_RES *res)
 	return false;
 }
 
-uint8_t get_stack_busno(const uint8_t stack)
+/* Returns the UBOX(stack) bus number when called from socket0 */
+uint8_t socket0_get_ubox_busno(const uint8_t stack)
 {
 	if (stack >= MAX_IIO_STACK) {
 		printk(BIOS_ERR, "%s: Stack %u does not exist!\n", __func__, stack);
@@ -104,14 +105,6 @@ uint32_t get_socket_stack_busno(uint32_t socket, uint32_t stack)
 	return hob->PlatformData.CpuQpiInfo[socket].StackBus[stack];
 }
 
-uint32_t get_socket_ubox_busno(uint32_t socket)
-{
-	if (socket == 0)
-		return get_stack_busno(PCU_IIO_STACK);
-
-	return get_socket_stack_busno(socket, PCU_IIO_STACK);
-}
-
 #if ENV_RAMSTAGE
 void config_reset_cpl3_csrs(void)
 {

src/soc/intel/xeon_sp/spr/include/soc/soc_util.h

@@ -45,8 +45,7 @@ const SYSTEM_INFO_VAR *get_system_info_hob(void);
 
 const EWL_PRIVATE_DATA *get_ewl_hob(void);
 
-uint32_t get_ubox_busno(uint32_t socket, uint8_t offset);
+uint8_t socket0_get_ubox_busno(uint8_t offset);
-uint32_t get_socket_ubox_busno(uint32_t socket);
 void soc_set_mrc_cold_boot_flag(bool cold_boot_required);
 void soc_config_iio(FSPM_UPD *mupd, const UPD_IIO_PCIE_PORT_CONFIG_ENTRY
 	mb_iio_table[CONFIG_MAX_SOCKET][IIO_PORT_SETTINGS], const UINT8 mb_iio_bifur[CONFIG_MAX_SOCKET][5]);

src/soc/intel/xeon_sp/spr/soc_util.c

@@ -144,25 +144,20 @@ uint32_t get_socket_stack_busno(uint32_t socket, uint32_t stack)
 	return hob->PlatformData.IIO_resource[socket].StackRes[stack].BusBase;
 }
 
-uint32_t get_ubox_busno(uint32_t socket, uint8_t offset)
+/* Returns the UBOX(offset) bus number for socket0 */
+uint8_t socket0_get_ubox_busno(uint8_t offset)
 {
 	const IIO_UDS *hob = get_iio_uds();
 
-	assert(socket < CONFIG_MAX_SOCKET);
 	for (int stack = 0; stack < MAX_LOGIC_IIO_STACK; ++stack) {
-		if (hob->PlatformData.IIO_resource[socket].StackRes[stack].Personality
+		if (hob->PlatformData.IIO_resource[0].StackRes[stack].Personality
 		    == TYPE_UBOX)
-			return (hob->PlatformData.IIO_resource[socket].StackRes[stack].BusBase
+			return (hob->PlatformData.IIO_resource[0].StackRes[stack].BusBase
 				+ offset);
 	}
 	die("Unable to locate UBOX BUS NO");
 }
 
-uint32_t get_socket_ubox_busno(uint32_t socket)
-{
-	return get_ubox_busno(socket, UNCORE_BUS_1);
-}
-
 void bios_done_msr(void *unused)
 {
 	msr_t msr = rdmsr(MSR_BIOS_DONE);

src/soc/intel/xeon_sp/util.c

@@ -17,12 +17,15 @@
 #include <soc/util.h>
 #include <timer.h>
 
+/* Only call this code from socket0! */
 void unlock_pam_regions(void)
 {
 	uint32_t pam0123_unlock_dram = 0x33333330;
 	uint32_t pam456_unlock_dram = 0x00333333;
-	uint32_t bus1 = get_socket_ubox_busno(0);
+	/* Get UBOX(1) for socket0 */
+	uint32_t bus1 = socket0_get_ubox_busno(PCU_IIO_STACK);
 
+	/* Assume socket0 owns PCI segment 0 */
 	pci_io_write_config32(PCI_DEV(bus1, SAD_ALL_DEV, SAD_ALL_FUNC),
 		SAD_ALL_PAM0123_CSR, pam0123_unlock_dram);
 	pci_io_write_config32(PCI_DEV(bus1, SAD_ALL_DEV, SAD_ALL_FUNC),