cpu/intel: Rename socket_mFCPGA478 to socket_m

The name was wrong. mFCPGA478 is actually a pseudonym for mPGA478MN,
the successor of the socket that was meant.

The official name of this socket is mPGA478MT. But "Socket M" is much
easier to distinguish.

Change-Id: I4efeaca69acddfcdc5e957b0b521544314d46eeb
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/31642
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Nico Huber
2019-02-27 14:23:18 +01:00
committed by Patrick Georgi
parent 620e0f3f22
commit 4829af17e3
21 changed files with 22 additions and 22 deletions

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config CPU_INTEL_SOCKET_M
bool
if CPU_INTEL_SOCKET_M
config SOCKET_SPECIFIC_OPTIONS # dummy
def_bool y
select CPU_INTEL_MODEL_69X
select CPU_INTEL_MODEL_6DX
select CPU_INTEL_MODEL_6EX
select CPU_INTEL_MODEL_6FX
select MMX
select SSE
config DCACHE_RAM_BASE
hex
default 0xfefc0000
config DCACHE_RAM_SIZE
hex
default 0x8000
endif

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subdirs-y += ../model_69x
subdirs-y += ../model_6dx
subdirs-y += ../model_6ex
subdirs-y += ../model_6fx
subdirs-y += ../../x86/tsc
subdirs-y += ../../x86/mtrr
subdirs-y += ../../x86/lapic
subdirs-y += ../../x86/cache
subdirs-y += ../../x86/smm
subdirs-y += ../microcode
subdirs-y += ../hyperthreading
subdirs-y += ../speedstep
cpu_incs-y += $(src)/cpu/intel/car/core2/cache_as_ram.S
postcar-y += ../car/p4-netburst/exit_car.S
romstage-y += ../car/romstage.c