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Replace dual_core and quad_core CMOS (nvram) options with multi_core. Fix some white space.

Browse Source 
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5380 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Myles Watson 2010-04-08 15:06:44 +00:00
parent 604877eb2a
commit 4839e2c495
91 changed files with 140 additions and 140 deletions
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4
src/cpu/amd/dualcore/amd_sibling.c
View File

@ -61,7 +61,7 @@ unsigned get_apicid_base(unsigned ioapic_num)
unsigned nb_cfg_54; unsigned nb_cfg_54;
int bsp_apic_id = lapicid(); // bsp apicid int bsp_apic_id = lapicid(); // bsp apicid
get_option(&disable_siblings, "dual_core"); get_option(&disable_siblings, "multi_core");
//get the nodes number //get the nodes number
dev = dev_find_slot(0, PCI_DEVFN(0x18,0)); dev = dev_find_slot(0, PCI_DEVFN(0x18,0));
@ -129,7 +129,7 @@ void amd_sibling_init(device_t cpu)
/* On the bootstrap processor see if I want sibling cpus enabled */ /* On the bootstrap processor see if I want sibling cpus enabled */
if (first_time) { if (first_time) {
first_time = 0; first_time = 0;
get_option(&disable_siblings, "dual_core"); get_option(&disable_siblings, "multi_core");
} }
result = cpuid(0x80000008); result = cpuid(0x80000008);
/* See how many sibling cpus we have */ /* See how many sibling cpus we have */

4
src/cpu/amd/dualcore/dualcore.c
View File

@ -57,8 +57,8 @@ static inline void start_other_cores(void)
unsigned nodeid; unsigned nodeid;
if (CONFIG_HAVE_OPTION_TABLE && if (CONFIG_HAVE_OPTION_TABLE &&
read_option(CMOS_VSTART_dual_core, CMOS_VLEN_dual_core, 0) != 0) { read_option(CMOS_VSTART_multi_core, CMOS_VLEN_multi_core, 0) != 0) {
return; // disable dual_core return; // disable multi_core
} }
nodes = get_nodes(); nodes = get_nodes();

2
src/cpu/amd/model_10xxx/init_cpus.c
View File

@ -131,7 +131,7 @@ static void for_each_ap(u32 bsp_apicid, u32 core_range,
disable_siblings = !CONFIG_LOGICAL_CPUS; disable_siblings = !CONFIG_LOGICAL_CPUS;
#if CONFIG_LOGICAL_CPUS == 1 #if CONFIG_LOGICAL_CPUS == 1
if(read_option(CMOS_VSTART_quad_core, CMOS_VLEN_quad_core, 0) != 0) { // 0 mean quad core if(read_option(CMOS_VSTART_multi_core, CMOS_VLEN_multi_core, 0) != 0) { // 0 mean multi core
disable_siblings = 1; disable_siblings = 1;
} }
#endif #endif

2
src/cpu/amd/model_fxx/init_cpus.c
View File

@ -57,7 +57,7 @@ static void for_each_ap(unsigned bsp_apicid, unsigned core_range, process_ap_t p
disable_siblings = !CONFIG_LOGICAL_CPUS; disable_siblings = !CONFIG_LOGICAL_CPUS;
#if CONFIG_LOGICAL_CPUS == 1 && CONFIG_HAVE_OPTION_TABLE == 1 #if CONFIG_LOGICAL_CPUS == 1 && CONFIG_HAVE_OPTION_TABLE == 1
if(read_option(CMOS_VSTART_dual_core, CMOS_VLEN_dual_core, 0) != 0) { // 0 mean dual core if(read_option(CMOS_VSTART_multi_core, CMOS_VLEN_multi_core, 0) != 0) { // 0 mean multi core
disable_siblings = 1; disable_siblings = 1;
} }
#endif #endif

2
src/cpu/amd/quadcore/amd_sibling.c
View File

@ -82,7 +82,7 @@ u32 get_apicid_base(u32 ioapic_num)
u32 disable_siblings = !CONFIG_LOGICAL_CPUS; u32 disable_siblings = !CONFIG_LOGICAL_CPUS;
get_option(&disable_siblings, "quad_core"); get_option(&disable_siblings, "multi_core");
siblings = get_max_siblings(sysconf.nodes); siblings = get_max_siblings(sysconf.nodes);

4
src/cpu/amd/quadcore/quadcore.c
View File

@ -86,8 +86,8 @@ static void start_other_cores(void)
u32 nodes; u32 nodes;
u32 nodeid; u32 nodeid;
// disable quad_core // disable multi_core
if (read_option(CMOS_VSTART_quad_core, CMOS_VLEN_quad_core, 0) != 0) { if (read_option(CMOS_VSTART_multi_core, CMOS_VLEN_multi_core, 0) != 0) {
printk(BIOS_DEBUG, "Skip additional core init\n"); printk(BIOS_DEBUG, "Skip additional core init\n");
return; return;
} }

2
src/mainboard/amd/dbm690t/cmos.layout
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@ -53,7 +53,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/amd/mahogany/cmos.layout
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@ -53,7 +53,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/amd/mahogany_fam10/cmos.layout
View File

@ -32,7 +32,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 quad_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/amd/pistachio/cmos.layout
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@ -53,7 +53,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/amd/serengeti_cheetah/cmos.layout
View File

@ -32,7 +32,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/amd/serengeti_cheetah_fam10/cmos.layout
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@ -32,7 +32,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 quad_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/arima/hdama/cmos.layout
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@ -32,7 +32,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/asrock/939a785gmh/cmos.layout
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@ -53,7 +53,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/asus/a8n_e/cmos.layout
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@ -31,7 +31,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/asus/a8v-e_se/cmos.layout
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@ -32,7 +32,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/asus/m2v-mx_se/cmos.layout
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@ -32,7 +32,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/broadcom/blast/cmos.layout
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@ -32,7 +32,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/gigabyte/ga_2761gxdk/cmos.layout
View File

@ -53,7 +53,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/gigabyte/m57sli/cmos.layout
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@ -53,7 +53,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/hp/dl145_g3/cmos.layout
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@ -32,7 +32,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/ibm/e325/cmos.layout
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@ -32,7 +32,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/ibm/e326/cmos.layout
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@ -32,7 +32,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/iwill/dk8_htx/cmos.layout
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@ -32,7 +32,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/iwill/dk8s2/cmos.layout
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@ -32,7 +32,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/iwill/dk8x/cmos.layout
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@ -32,7 +32,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/kontron/kt690/cmos.layout
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@ -53,7 +53,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/msi/ms7135/cmos.layout
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@ -32,7 +32,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/msi/ms7260/cmos.layout
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@ -54,7 +54,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/msi/ms9185/cmos.layout
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@ -32,7 +32,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/msi/ms9282/cmos.layout
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@ -32,7 +32,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/msi/ms9652_fam10/cmos.layout
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@ -53,7 +53,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 quad_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/newisys/khepri/cmos.layout
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@ -32,7 +32,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/nvidia/l1_2pvv/cmos.layout
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@ -53,7 +53,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/sunw/ultra40/cmos.layout
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@ -32,7 +32,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/supermicro/h8dme/cmos.layout
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@ -53,7 +53,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/supermicro/h8dmr/cmos.layout
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@ -53,7 +53,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/supermicro/h8dmr_fam10/cmos.layout
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@ -53,7 +53,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 quad_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/supermicro/h8qme_fam10/cmos.layout
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@ -53,7 +53,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 quad_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/technexion/tim5690/cmos.layout
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@ -53,7 +53,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/technexion/tim8690/cmos.layout
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@ -53,7 +53,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/tyan/s2850/cmos.layout
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@ -32,7 +32,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/tyan/s2875/cmos.layout
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@ -32,7 +32,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/tyan/s2880/cmos.layout
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@ -32,7 +32,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/tyan/s2881/cmos.layout
View File

@ -32,7 +32,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/tyan/s2882/cmos.layout
View File

@ -32,7 +32,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/tyan/s2885/cmos.layout
View File

@ -32,7 +32,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/tyan/s2891/cmos.layout
View File

@ -32,7 +32,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/tyan/s2892/cmos.layout
View File

@ -32,7 +32,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/tyan/s2895/cmos.layout
View File

@ -32,7 +32,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/tyan/s2912/cmos.layout
View File

@ -53,7 +53,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/tyan/s2912_fam10/cmos.layout
View File

@ -53,7 +53,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 quad_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/tyan/s4880/cmos.layout
View File

@ -32,7 +32,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/mainboard/tyan/s4882/cmos.layout
View File

@ -32,7 +32,7 @@ entries
395 1 e 1 hw_scrubber 395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects 396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock 397 2 e 8 max_mem_clock
399 1 e 2 dual_core 399 1 e 2 multi_core
400 1 e 1 power_on_after_fail 400 1 e 1 power_on_after_fail
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first

2
src/northbridge/amd/amdfam10/northbridge.c
View File

@ -1234,7 +1234,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max)
disable_siblings = !CONFIG_LOGICAL_CPUS; disable_siblings = !CONFIG_LOGICAL_CPUS;
#if CONFIG_LOGICAL_CPUS == 1 #if CONFIG_LOGICAL_CPUS == 1
get_option(&disable_siblings, "quad_core"); get_option(&disable_siblings, "multi_core");
#endif #endif
// for pre_e0, nb_cfg_54 can not be set, ( even set, when you read it // for pre_e0, nb_cfg_54 can not be set, ( even set, when you read it

2
src/northbridge/amd/amdk8/coherent_ht.c
View File

@ -1595,7 +1595,7 @@ static void coherent_ht_finalize(unsigned nodes)
unsigned total_cpus; unsigned total_cpus;
if ((!CONFIG_HAVE_OPTION_TABLE) || if ((!CONFIG_HAVE_OPTION_TABLE) ||
read_option(CMOS_VSTART_dual_core, CMOS_VLEN_dual_core, 0) == 0) { /* dual_core */ read_option(CMOS_VSTART_multi_core, CMOS_VLEN_multi_core, 0) == 0) { /* multi_core */
total_cpus = verify_dualcore(nodes); total_cpus = verify_dualcore(nodes);
} }
else { else {

2
src/northbridge/amd/amdk8/northbridge.c
View File

@ -1142,7 +1142,7 @@ static unsigned int cpu_bus_scan(device_t dev, unsigned int max)
disable_siblings = !CONFIG_LOGICAL_CPUS; disable_siblings = !CONFIG_LOGICAL_CPUS;
#if CONFIG_LOGICAL_CPUS == 1 #if CONFIG_LOGICAL_CPUS == 1
get_option(&disable_siblings, "dual_core"); get_option(&disable_siblings, "multi_core");
#endif #endif
// for pre_e0, nb_cfg_54 can not be set, ( even set, when you read it still be 0) // for pre_e0, nb_cfg_54 can not be set, ( even set, when you read it still be 0)