Add support for memory mapped UARTs to coreboot and add the OXPCIe952 as an

example.

This newer version reflects the recent changes to further simplify the console
code and partly gets rid of some hacks in the previous version.

Signed-off-by: Stefan Reinauer <reinauer@google.com>
Acked-by: Peter Stuge <peter@stuge.se>                                                                                                                                          



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6544 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer
2011-04-26 23:47:04 +00:00
committed by Stefan Reinauer
parent 3187d0267d
commit 4885daadb3
20 changed files with 478 additions and 6 deletions

View File

@@ -2,9 +2,16 @@ menu "Console"
# TODO: Rename to SERIAL_CONSOLE once Kconfig transition is complete.
config CONSOLE_SERIAL8250
bool "Serial port console output"
depends on HAVE_UART_IO_MAPPED
default y
help
Send coreboot debug output to a serial port console.
Send coreboot debug output to an I/O mapped serial port console.
config CONSOLE_SERIAL8250MEM
bool "Serial port console output (memory mapped)"
depends on HAVE_UART_MEMORY_MAPPED
help
Send coreboot debug output to a memory mapped serial port console.
choice
prompt "Serial port"
@@ -43,7 +50,7 @@ config TTYS0_BASE
choice
prompt "Baud rate"
default CONSOLE_SERIAL_115200
depends on CONSOLE_SERIAL8250
depends on CONSOLE_SERIAL8250 || CONSOLE_SERIAL8250MEM
config CONSOLE_SERIAL_115200
bool "115200"
@@ -82,7 +89,7 @@ config TTYS0_BAUD
config TTYS0_LCS
int
default 3
depends on CONSOLE_SERIAL8250
depends on CONSOLE_SERIAL8250 || CONSOLE_SERIAL8250MEM
# Use "select HAVE_USBDEBUG" on southbridges which have Debug Port code.
config HAVE_USBDEBUG