Add support for memory mapped UARTs to coreboot and add the OXPCIe952 as an
example. This newer version reflects the recent changes to further simplify the console code and partly gets rid of some hacks in the previous version. Signed-off-by: Stefan Reinauer <reinauer@google.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6544 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Stefan Reinauer
parent
3187d0267d
commit
4885daadb3
@ -22,7 +22,7 @@
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#include <arch/hlt.h>
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#include <arch/io.h>
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#if CONFIG_CONSOLE_SERIAL8250
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#if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM
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#include <uart8250.h>
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#endif
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@ -106,6 +106,9 @@ void console_init(void)
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#if CONFIG_CONSOLE_SERIAL8250
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uart_init();
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#endif
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#if CONFIG_DRIVERS_OXFORD_OXPCIE && CONFIG_CONSOLE_SERIAL8250MEM
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oxford_init();
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#endif
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#if CONFIG_CONSOLE_NE2K
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ne2k_init(CONFIG_CONSOLE_NE2K_IO_PORT);
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#endif
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