Add support for memory mapped UARTs to coreboot and add the OXPCIe952 as an

example.

This newer version reflects the recent changes to further simplify the console
code and partly gets rid of some hacks in the previous version.

Signed-off-by: Stefan Reinauer <reinauer@google.com>
Acked-by: Peter Stuge <peter@stuge.se>                                                                                                                                          



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6544 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer
2011-04-26 23:47:04 +00:00
committed by Stefan Reinauer
parent 3187d0267d
commit 4885daadb3
20 changed files with 478 additions and 6 deletions

View File

@ -22,7 +22,7 @@
#include <arch/hlt.h>
#include <arch/io.h>
#if CONFIG_CONSOLE_SERIAL8250
#if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM
#include <uart8250.h>
#endif
@ -106,6 +106,9 @@ void console_init(void)
#if CONFIG_CONSOLE_SERIAL8250
uart_init();
#endif
#if CONFIG_DRIVERS_OXFORD_OXPCIE && CONFIG_CONSOLE_SERIAL8250MEM
oxford_init();
#endif
#if CONFIG_CONSOLE_NE2K
ne2k_init(CONFIG_CONSOLE_NE2K_IO_PORT);
#endif