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src: Remove redundant use of ACPI offset(0)

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IASL version 20180927 and greater, detects Unnecessary/redundant uses of
the Offset() operator within a Field Unit list.
It then sends a remark "^ Unnecessary/redundant use of Offset"

example:
    OperationRegion (OPR1, SystemMemory, 0x100, 0x100)
    Field (OPR1)
    {
        Offset (0),     // Never needed
        FLD1, 32,
        Offset (4),     // Redundant, offset is already 4 (bytes)
        FLD2, 8,
        Offset (64),    // OK use of Offset.
        FLD3, 16,
    }

We will have those remarks:
dsdt.asl     14:         Offset (0),
Remark   2158 -                 ^ Unnecessary/redundant use of Offset operator

dsdt.asl     16:         Offset (4),
Remark   2158 -                 ^ Unnecessary/redundant use of Offset operator

Change-Id: I260a79ef77025b4befbccc21f5999f89d90c1154
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43283
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Elyes HAOUAS
2020-07-08 09:22:13 +02:00
committed by Felix Held
parent d477565dbd
commit 48a6c018bc
30 changed files with 10 additions and 40 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibCore.esl
View File

@ -142,7 +142,6 @@
Add (Arg1, Local0, Local0)
OperationRegion(varOperationRegionMmio, SystemMemory, Local0, 0x4)
Field(varOperationRegionMmio, DWordAcc, NoLock, Preserve) {
Offset (0x0),
varPciReg32, 32,
}
return (varPciReg32)
@ -160,7 +159,6 @@
Add (Arg1, Local0, Local0)
OperationRegion(varOperationRegionMmio, SystemMemory, Local0, 0x4)
Field(varOperationRegionMmio, DWordAcc, NoLock, Preserve) {
Offset (0x0),
varPciReg32, 32,
}
Store (Arg2, varPciReg32)

2
src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlibPciLib.esl
View File

@ -55,7 +55,6 @@
Add (Arg1, Local0, Local0)
OperationRegion(varOperationRegionMmio, SystemMemory, Local0, 0x4)
Field(varOperationRegionMmio, DWordAcc, NoLock, Preserve) {
Offset (0x0),
varPciReg32, 32,
}
return (varPciReg32)
@ -73,7 +72,6 @@
Add (Arg1, Local0, Local0)
OperationRegion(varOperationRegionMmio, SystemMemory, Local0, 0x4)
Field(varOperationRegionMmio, DWordAcc, NoLock, Preserve) {
Offset (0x0),
varPciReg32, 32,
}
Store (Arg2, varPciReg32)