mb/google/guybrush/var/nipperkin: Enable GPP2 for NVMe bridge eMMC storage
BUG=b:195269555 BRANCH=guybrush TEST=emerge-guybrush coreboot chromeos-bootimage eMMC sku is bootable Signed-off-by: Kevin Chiu <kevin.chiu@quantatw.com> Change-Id: If9e0fdc1667cbaac05fdf4c6689d47a561016c9e Reviewed-on: https://review.coreboot.org/c/coreboot/+/58413 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
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@@ -34,6 +34,15 @@ chip soc/amd/cezanne
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register "name" = ""NVME""
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register "name" = ""NVME""
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device pci 00.0 on end
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device pci 00.0 on end
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end
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end
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probe STORAGE STORAGE_EMMC
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end # EMMC
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device ref gpp_bridge_3 on
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# Required so the NVMe gets placed into D3 when entering S0i3.
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chip drivers/pcie/rtd3/device
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register "name" = ""NVME""
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device pci 00.0 on end
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end
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probe STORAGE STORAGE_SSD
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end # NVMe
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end # NVMe
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device ref gpp_bridge_a on # Internal GPP Bridge 0 to Bus A
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device ref gpp_bridge_a on # Internal GPP Bridge 0 to Bus A
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device ref acp on
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device ref acp on
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