mb/protectli/vault_kbl: Add FW6 support
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: I03e8e8db5d827fe113280f2a6376d364edf42870 Reviewed-on: https://review.coreboot.org/c/coreboot/+/33839 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
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Michał Żygowski
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Patrick Georgi
Patrick Georgi
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@@ -120,6 +120,7 @@ The boards in this section are not real mainboards, but emulators.
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## Protectli
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- [FW2B / FW4B](protectli/fw2b_fw4b.md)
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- [FW6A / FW6B / FW6C](protectli/fw6.md)
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## Roda
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Documentation/mainboard/protectli/fw6.jpg
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Documentation/mainboard/protectli/fw6.md
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Documentation/mainboard/protectli/fw6.md
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# Protectli Vault FW6 series
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This page describes how to run coreboot on the [Protectli FW6].
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## Required proprietary blobs
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To build a minimal working coreboot image some blobs are required (assuming
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only the BIOS region is being modified).
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```eval_rst
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+-----------------+---------------------------------+---------------------+
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| Binary file | Apply | Required / Optional |
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+=================+=================================+=====================+
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| FSP-M, FSP-S | Intel Firmware Support Package | Required |
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+-----------------+---------------------------------+---------------------+
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| microcode | CPU microcode | Required |
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+-----------------+---------------------------------+---------------------+
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| vgabios | VGA Option ROM | Optional |
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+-----------------+---------------------------------+---------------------+
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```
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FSP-M and FSP-S are obtained after splitting the Kaby Lake FSP binary (done
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automatically by the coreboot build system and included into the image) from
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the `3rdparty/fsp` submodule.
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Microcode updates are automatically included into the coreboot image by build
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system from the `3rdparty/intel-microcode` submodule.
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VGA Option ROM is not required to boot, but if one needs graphics in pre-OS
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stage, it should be included (if not using libgfxinit).
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## Flashing coreboot
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### Internal programming
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The main SPI flash can be accessed using [flashrom]. The first version
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supporting the chipset is flashrom v1.1. Firmware an be easily flashed
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with internal programmer (either BIOS region or full image).
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### External programming
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The system has an internal flash chip which is a 8 MiB soldered SOIC-8 chip.
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This chip is located on the bottom side of the case (the radiator side). One
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has to remove all screws (in order): 4 top cover screws, 4 side cover screws
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(one side is enough), 4 mainboard screws, 4 CPU screws (under DIMMs). Lift up
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the mainboard and turn around it. The flash chip is near the SoC on the DIMM
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slots side. Use a clip (or solder the wires) to program the chip. Specifically,
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it's a Macronix MX25L6406E (3.3V) -[datasheet][MX25L6406E].
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## Known issues
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- After flashing with external programmer it is always required to reset RTC
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with jumper or disconnect coin cell temporarily. Only then the platform will
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boot after flashing.
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- FW6A does not always work reliably with all DIMMs. Linux happens to hang or
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gives many panics. This issue was present also with vendor BIOS.
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- Sometimes FSPMemoryInit return errors or hangs (especially with 2 DIMMs
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connected). A workaround is to power cycle the board (even a few times) or
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temporarily disconnect DIMM when platform is powered off.
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- When using libgfxinit and SeaBIOS bootsplash, the red color is dim
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## Untested
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Not all mainboard's peripherals and functions were tested because of lack of
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the cables or not being populated on the board case.
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- Internal USB 2.0 headers
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- Boot with cleaned ME
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## Working
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- USB 3.0 front ports (SeaBIOS and Linux)
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- 6 Ethernet ports
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- HDMI port with libgfxinit and VGA Option ROM
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- flashrom
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- PCIe WiFi
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- SATA and mSATA
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- Super I/O serial port 0 (RS232 via front RJ45 connector)
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- SMBus (reading SPD from DIMMs)
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- Initialization with KBL FSP 2.0 (with MemoryInit issues)
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- SeaBIOS payload (version rel-1.12.1)
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- Mini PCIe debug card connected to mSATA (mSATA slot has LPC signals routed)
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- Reset switch
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- Booting Debian, Ubuntu, FreeBSD
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## Technology
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There are 3 variants of FW6 boards: FW6A, FW6B and FW6C. They differ only in
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used SoC.
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- FW6A:
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```eval_rst
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+------------------+--------------------------------------------------+
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| CPU | Intel Celeron 3865U |
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+------------------+--------------------------------------------------+
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| PCH | Kaby Lake U w/ iHDCP2.2 Base |
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+------------------+--------------------------------------------------+
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| Super I/O, EC | ITE IT8772E |
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+------------------+--------------------------------------------------+
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| Coprocessor | Intel Management Engine |
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+------------------+--------------------------------------------------+
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```
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- FW6B:
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```eval_rst
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+------------------+--------------------------------------------------+
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| CPU | Intel Core i3-7100U |
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+------------------+--------------------------------------------------+
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| PCH | Kaby Lake U w/ iHDCP2.2 Premium |
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+------------------+--------------------------------------------------+
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| Super I/O, EC | ITE IT8772E |
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+------------------+--------------------------------------------------+
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| Coprocessor | Intel Management Engine |
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+------------------+--------------------------------------------------+
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```
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- FW6C:
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```eval_rst
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+------------------+--------------------------------------------------+
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| CPU | Intel Core i5-7200U |
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+------------------+--------------------------------------------------+
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| PCH | Kaby Lake U w/ iHDCP2.2 Premium |
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+------------------+--------------------------------------------------+
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| Super I/O, EC | ITE IT8772E |
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+------------------+--------------------------------------------------+
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| Coprocessor | Intel Management Engine |
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+------------------+--------------------------------------------------+
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```
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[Protectli FW6]: https://protectli.com/vault-6-port/
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[MX25L6406E]: https://www.macronix.com/Lists/Datasheet/Attachments/7370/MX25L6406E,%203V,%2064Mb,%20v1.9.pdf
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[flashrom]: https://flashrom.org/Flashrom
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