commonlib: Move drivers/storage into commonlib/storage
Move drivers/storage into commonlib/storage to enable access by libpayload and indirectly by payloads. * Remove SD/MMC specific include files from include/device * Remove files from drivers/storage * Add SD/MMC specific include files to commonlib/include * Add files to commonlib/storage * Fix header file references * Add subdir entry in commonlib/Makefile.inc to build the SD/MMC driver * Add Kconfig source for commonlib/storage * Rename *DEVICE* to *COMMONLIB* * Rename *DRIVERS_STORAGE* to *COMMONLIB_STORAGE* TEST=Build and run on Galileo Gen2 Change-Id: I4339e4378491db9a0da1f2dc34e1906a5ba31ad6 Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Reviewed-on: https://review.coreboot.org/19672 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Lee Leahy
545
src/commonlib/storage/mmc.c
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545
src/commonlib/storage/mmc.c
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@ -0,0 +1,545 @@
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/*
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* Copyright 2008, Freescale Semiconductor, Inc
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* Andy Fleming
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*
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* Copyright 2013 Google Inc. All rights reserved.
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* Copyright 2017 Intel Corporation
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*
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* MultiMediaCard (MMC) and eMMC specific support code
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* This code is controller independent
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <commonlib/storage.h>
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#include <console/console.h>
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#include "sd_mmc.h"
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#include "mmc.h"
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#include "sd_mmc.h"
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#include "storage.h"
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#include <string.h>
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/* We pass in the cmd since otherwise the init seems to fail */
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static int mmc_send_op_cond_iter(struct storage_media *media,
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struct mmc_command *cmd, int use_arg)
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{
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struct sd_mmc_ctrlr *ctrlr = media->ctrlr;
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cmd->cmdidx = MMC_CMD_SEND_OP_COND;
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cmd->resp_type = CARD_RSP_R3;
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/* Set the controller's operating conditions */
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if (use_arg) {
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uint32_t mask = media->op_cond_response &
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(OCR_VOLTAGE_MASK | OCR_ACCESS_MODE);
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cmd->cmdarg = ctrlr->voltages & mask;
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/* Always request high capacity if supported by the
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* controller
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*/
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if (ctrlr->caps & DRVR_CAP_HC)
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cmd->cmdarg |= OCR_HCS;
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}
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cmd->flags = 0;
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int err = ctrlr->send_cmd(ctrlr, cmd, NULL);
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if (err)
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return err;
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media->op_cond_response = cmd->response[0];
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return 0;
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}
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int mmc_send_op_cond(struct storage_media *media)
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{
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struct mmc_command cmd;
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int max_iters = 2;
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/* Ask the card for its operating conditions */
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cmd.cmdarg = 0;
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for (int i = 0; i < max_iters; i++) {
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int err = mmc_send_op_cond_iter(media, &cmd, i != 0);
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if (err)
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return err;
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// OCR_BUSY is active low, this bit set means
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// "initialization complete".
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if (media->op_cond_response & OCR_BUSY)
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return 0;
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}
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return CARD_IN_PROGRESS;
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}
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int mmc_complete_op_cond(struct storage_media *media)
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{
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struct mmc_command cmd;
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struct stopwatch sw;
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stopwatch_init_msecs_expire(&sw, MMC_INIT_TIMEOUT_US_MS);
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while (1) {
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// CMD1 queries whether initialization is done.
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int err = mmc_send_op_cond_iter(media, &cmd, 1);
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if (err)
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return err;
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// OCR_BUSY means "initialization complete".
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if (media->op_cond_response & OCR_BUSY)
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break;
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// Check if init timeout has expired.
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if (stopwatch_expired(&sw))
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return CARD_UNUSABLE_ERR;
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udelay(100);
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}
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media->version = MMC_VERSION_UNKNOWN;
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media->ocr = cmd.response[0];
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media->high_capacity = ((media->ocr & OCR_HCS) == OCR_HCS);
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media->rca = 0;
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return 0;
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}
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int mmc_send_ext_csd(struct sd_mmc_ctrlr *ctrlr, unsigned char *ext_csd)
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{
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struct mmc_command cmd;
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struct mmc_data data;
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int rv;
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/* Get the Card Status Register */
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cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
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cmd.resp_type = CARD_RSP_R1;
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cmd.cmdarg = 0;
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cmd.flags = 0;
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data.dest = (char *)ext_csd;
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data.blocks = 1;
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data.blocksize = 512;
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data.flags = DATA_FLAG_READ;
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rv = ctrlr->send_cmd(ctrlr, &cmd, &data);
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if (!rv && IS_ENABLED(CONFIG_SD_MMC_TRACE)) {
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int i, size;
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size = data.blocks * data.blocksize;
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sd_mmc_trace("\t%p ext_csd:", ctrlr);
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for (i = 0; i < size; i++) {
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if (!(i % 32))
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sd_mmc_trace("\n");
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sd_mmc_trace(" %2.2x", ext_csd[i]);
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}
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sd_mmc_trace("\n");
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}
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return rv;
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}
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static int mmc_switch(struct storage_media *media, uint8_t index, uint8_t value)
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{
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struct mmc_command cmd;
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struct sd_mmc_ctrlr *ctrlr = media->ctrlr;
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cmd.cmdidx = MMC_CMD_SWITCH;
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cmd.resp_type = CARD_RSP_R1b;
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cmd.cmdarg = ((MMC_SWITCH_MODE_WRITE_BYTE << 24) |
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(index << 16) | (value << 8));
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cmd.flags = 0;
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int ret = ctrlr->send_cmd(ctrlr, &cmd, NULL);
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/* Waiting for the ready status */
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sd_mmc_send_status(media, SD_MMC_IO_RETRIES);
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return ret;
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}
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static void mmc_recalculate_clock(struct storage_media *media)
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{
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uint32_t clock;
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clock = CLOCK_26MHZ;
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if (media->caps & DRVR_CAP_HS) {
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if ((media->caps & DRVR_CAP_HS200) ||
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(media->caps & DRVR_CAP_HS400))
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clock = CLOCK_200MHZ;
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else if (media->caps & DRVR_CAP_HS52)
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clock = CLOCK_52MHZ;
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}
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SET_CLOCK(media->ctrlr, clock);
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}
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static int mmc_select_hs(struct storage_media *media)
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{
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int ret;
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/* Switch the MMC device into high speed mode */
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ret = mmc_switch(media, EXT_CSD_HS_TIMING, EXT_CSD_TIMING_HS);
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if (ret) {
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sd_mmc_error("Timing switch to high speed failed\n");
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return ret;
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}
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sdhc_debug("SDHCI switched MMC to high speed\n");
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/* Increase the controller clock speed */
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SET_TIMING(media->ctrlr, BUS_TIMING_MMC_HS);
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media->caps |= DRVR_CAP_HS52 | DRVR_CAP_HS;
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mmc_recalculate_clock(media);
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ret = sd_mmc_send_status(media, SD_MMC_IO_RETRIES);
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return ret;
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}
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static int mmc_send_tunning_seq(struct sd_mmc_ctrlr *ctrlr, char *buffer)
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{
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struct mmc_command cmd;
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struct mmc_data data;
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/* Request the device send the tuning sequence to the host */
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cmd.cmdidx = MMC_CMD_AUTO_TUNING_SEQUENCE;
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cmd.resp_type = CARD_RSP_R1;
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cmd.cmdarg = 0;
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cmd.flags = CMD_FLAG_IGNORE_INHIBIT;
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data.dest = buffer;
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data.blocks = 1;
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data.blocksize = (ctrlr->bus_width == 8) ? 128 : 64;
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data.flags = DATA_FLAG_READ;
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return ctrlr->send_cmd(ctrlr, &cmd, &data);
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}
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static int mmc_bus_tuning(struct storage_media *media)
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{
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ALLOC_CACHE_ALIGN_BUFFER(char, buffer, 128);
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struct sd_mmc_ctrlr *ctrlr = media->ctrlr;
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int index;
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int successful;
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/* Request the device send the tuning sequence up to 40 times */
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ctrlr->tuning_start(ctrlr, 0);
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for (index = 0; index < 40; index++) {
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mmc_send_tunning_seq(ctrlr, buffer);
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if (ctrlr->is_tuning_complete(ctrlr, &successful)) {
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if (successful)
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return 0;
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break;
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}
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}
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sd_mmc_error("Bus tuning failed!\n");
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return -1;
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}
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static int mmc_select_hs400(struct storage_media *media)
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{
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uint8_t bus_width;
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uint32_t caps;
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struct sd_mmc_ctrlr *ctrlr = media->ctrlr;
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int ret;
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uint32_t timing;
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/* Switch the MMC device into high speed mode */
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ret = mmc_select_hs(media);
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if (ret)
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return ret;
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/* Switch MMC device to 8-bit DDR with strobe */
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bus_width = EXT_CSD_DDR_BUS_WIDTH_8;
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caps = DRVR_CAP_HS400 | DRVR_CAP_HS52 | DRVR_CAP_HS;
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timing = BUS_TIMING_MMC_HS400;
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if ((ctrlr->caps & DRVR_CAP_ENHANCED_STROBE)
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&& (media->caps & DRVR_CAP_ENHANCED_STROBE)) {
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bus_width |= EXT_CSD_BUS_WIDTH_STROBE;
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caps |= DRVR_CAP_ENHANCED_STROBE;
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timing = BUS_TIMING_MMC_HS400ES;
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}
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ret = mmc_switch(media, EXT_CSD_BUS_WIDTH, bus_width);
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if (ret) {
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sd_mmc_error("Switching bus width for HS400 failed\n");
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return ret;
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}
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sdhc_debug("SDHCI switched MMC to 8-bit DDR\n");
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/* Set controller to 8-bit mode */
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SET_BUS_WIDTH(ctrlr, 8);
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media->caps |= EXT_CSD_BUS_WIDTH_8;
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/* Switch MMC device to HS400 */
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ret = mmc_switch(media, EXT_CSD_HS_TIMING, EXT_CSD_TIMING_HS400);
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if (ret) {
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sd_mmc_error("Switch to HS400 timing failed\n");
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return ret;
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}
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/* Set controller to 200 MHz and use receive strobe */
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SET_TIMING(ctrlr, timing);
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media->caps |= caps;
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mmc_recalculate_clock(media);
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ret = sd_mmc_send_status(media, SD_MMC_IO_RETRIES);
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return ret;
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}
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static int mmc_select_hs200(struct storage_media *media)
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{
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struct sd_mmc_ctrlr *ctrlr = media->ctrlr;
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int ret;
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/* Switch the MMC device to 8-bit SDR */
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ret = mmc_switch(media, EXT_CSD_BUS_WIDTH, EXT_CSD_BUS_WIDTH_8);
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if (ret) {
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sd_mmc_error("Switching bus width for HS200 failed\n");
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return ret;
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}
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/* Set controller to 8-bit mode */
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SET_BUS_WIDTH(ctrlr, 8);
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media->caps |= EXT_CSD_BUS_WIDTH_8;
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/* Switch to HS200 */
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ret = mmc_switch(media, EXT_CSD_HS_TIMING, EXT_CSD_TIMING_HS200);
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if (ret) {
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sd_mmc_error("Switch to HS200 failed\n");
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return ret;
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}
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sdhc_debug("SDHCI switched MMC to 8-bit SDR\n");
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/* Set controller to 200 MHz */
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SET_TIMING(ctrlr, BUS_TIMING_MMC_HS200);
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media->caps |= DRVR_CAP_HS200 | DRVR_CAP_HS52 | DRVR_CAP_HS;
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mmc_recalculate_clock(media);
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/* Tune the receive sampling point for the bus */
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if ((!ret) && (ctrlr->caps & DRVR_CAP_HS200_TUNING))
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ret = mmc_bus_tuning(media);
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return ret;
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}
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int mmc_change_freq(struct storage_media *media)
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{
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struct sd_mmc_ctrlr *ctrlr = media->ctrlr;
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int err;
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ALLOC_CACHE_ALIGN_BUFFER(unsigned char, ext_csd, 512);
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media->caps = 0;
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/* Only version 4 supports high-speed */
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if (media->version < MMC_VERSION_4)
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return 0;
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err = mmc_send_ext_csd(ctrlr, ext_csd);
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if (err)
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return err;
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if ((ctrlr->caps & DRVR_CAP_HS400) &&
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(ext_csd[EXT_CSD_CARD_TYPE] & MMC_HS400))
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err = mmc_select_hs400(media);
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else if ((ctrlr->caps & DRVR_CAP_HS200) &&
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(ext_csd[EXT_CSD_CARD_TYPE] & MMC_HS_200MHZ))
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err = mmc_select_hs200(media);
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else
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err = mmc_select_hs(media);
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return err;
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}
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int mmc_set_bus_width(struct storage_media *media)
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{
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struct sd_mmc_ctrlr *ctrlr = media->ctrlr;
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int err;
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int width;
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ALLOC_CACHE_ALIGN_BUFFER(unsigned char, ext_csd, EXT_CSD_SIZE);
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ALLOC_CACHE_ALIGN_BUFFER(unsigned char, test_csd, EXT_CSD_SIZE);
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/* Set the bus width */
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err = 0;
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for (width = EXT_CSD_BUS_WIDTH_8; width >= 0; width--) {
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/* If HS200 is switched, Bus Width has been 8-bit */
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if ((media->caps & DRVR_CAP_HS200) ||
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(media->caps & DRVR_CAP_HS400))
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break;
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/* Set the card to use 4 bit*/
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err = mmc_switch(media, EXT_CSD_BUS_WIDTH, width);
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if (err)
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continue;
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if (!width) {
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SET_BUS_WIDTH(ctrlr, 1);
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break;
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}
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SET_BUS_WIDTH(ctrlr, 4 * width);
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err = mmc_send_ext_csd(ctrlr, test_csd);
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if (!err &&
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(ext_csd[EXT_CSD_PARTITIONING_SUPPORT] ==
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test_csd[EXT_CSD_PARTITIONING_SUPPORT]) &&
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(ext_csd[EXT_CSD_ERASE_GROUP_DEF] ==
|
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test_csd[EXT_CSD_ERASE_GROUP_DEF]) &&
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(ext_csd[EXT_CSD_REV] ==
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test_csd[EXT_CSD_REV]) &&
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(ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] ==
|
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test_csd[EXT_CSD_HC_ERASE_GRP_SIZE]) &&
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memcmp(&ext_csd[EXT_CSD_SEC_CNT],
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||||
&test_csd[EXT_CSD_SEC_CNT], 4) == 0) {
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media->caps |= width;
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break;
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||||
}
|
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}
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return err;
|
||||
}
|
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|
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int mmc_update_capacity(struct storage_media *media)
|
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{
|
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uint64_t capacity;
|
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struct sd_mmc_ctrlr *ctrlr = media->ctrlr;
|
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int err;
|
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ALLOC_CACHE_ALIGN_BUFFER(unsigned char, ext_csd, EXT_CSD_SIZE);
|
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uint32_t erase_size;
|
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uint32_t hc_erase_size;
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uint64_t hc_wp_size;
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int index;
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|
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if (media->version < MMC_VERSION_4)
|
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return 0;
|
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|
||||
/* check ext_csd version and capacity */
|
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err = mmc_send_ext_csd(ctrlr, ext_csd);
|
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if (err)
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return err;
|
||||
|
||||
if (ext_csd[EXT_CSD_REV] < 2)
|
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return 0;
|
||||
|
||||
/* Determine if the device supports enhanced strobe */
|
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media->caps |= ext_csd[EXT_CSD_STROBE_SUPPORT]
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||||
? DRVR_CAP_ENHANCED_STROBE : 0;
|
||||
|
||||
/* Determine the eMMC device information */
|
||||
media->partition_config = ext_csd[EXT_CSD_PART_CONF]
|
||||
& EXT_CSD_PART_ACCESS_MASK;
|
||||
|
||||
/* Determine the user partition size
|
||||
*
|
||||
* According to the JEDEC Standard, the value of
|
||||
* ext_csd's capacity is valid if the value is
|
||||
* more than 2GB
|
||||
*/
|
||||
capacity = (ext_csd[EXT_CSD_SEC_CNT + 0] << 0 |
|
||||
ext_csd[EXT_CSD_SEC_CNT + 1] << 8 |
|
||||
ext_csd[EXT_CSD_SEC_CNT + 2] << 16 |
|
||||
ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
|
||||
capacity *= 512;
|
||||
if ((capacity >> 20) > 2 * 1024)
|
||||
media->capacity[MMC_PARTITION_USER] = capacity;
|
||||
|
||||
/* Determine the boot parition sizes */
|
||||
hc_erase_size = ext_csd[224] * 512 * KiB;
|
||||
capacity = ext_csd[EXT_CSD_BOOT_SIZE_MULT] * 128 * KiB;
|
||||
media->capacity[MMC_PARTITION_BOOT_1] = capacity;
|
||||
media->capacity[MMC_PARTITION_BOOT_2] = capacity;
|
||||
|
||||
/* Determine the RPMB size */
|
||||
hc_wp_size = ext_csd[EXT_CSD_HC_WP_GRP_SIZE] * hc_erase_size;
|
||||
capacity = 128 * KiB * ext_csd[EXT_CSD_RPMB_SIZE_MULT];
|
||||
media->capacity[MMC_PARTITION_RPMB] = capacity;
|
||||
|
||||
/* Determine the general partition sizes */
|
||||
capacity = (ext_csd[EXT_CSD_GP_SIZE_MULT_GP0 + 2] << 16)
|
||||
| (ext_csd[EXT_CSD_GP_SIZE_MULT_GP0 + 1] << 8)
|
||||
| ext_csd[EXT_CSD_GP_SIZE_MULT_GP0];
|
||||
capacity *= hc_wp_size;
|
||||
media->capacity[MMC_PARTITION_GP1] = capacity;
|
||||
|
||||
capacity = (ext_csd[EXT_CSD_GP_SIZE_MULT_GP1 + 2] << 16)
|
||||
| (ext_csd[EXT_CSD_GP_SIZE_MULT_GP1 + 1] << 8)
|
||||
| ext_csd[EXT_CSD_GP_SIZE_MULT_GP1];
|
||||
capacity *= hc_wp_size;
|
||||
media->capacity[MMC_PARTITION_GP2] = capacity;
|
||||
|
||||
capacity = (ext_csd[EXT_CSD_GP_SIZE_MULT_GP2 + 2] << 16)
|
||||
| (ext_csd[EXT_CSD_GP_SIZE_MULT_GP2 + 1] << 8)
|
||||
| ext_csd[EXT_CSD_GP_SIZE_MULT_GP2];
|
||||
capacity *= hc_wp_size;
|
||||
media->capacity[MMC_PARTITION_GP3] = capacity;
|
||||
|
||||
capacity = (ext_csd[EXT_CSD_GP_SIZE_MULT_GP3 + 2] << 16)
|
||||
| (ext_csd[EXT_CSD_GP_SIZE_MULT_GP3 + 1] << 8)
|
||||
| ext_csd[EXT_CSD_GP_SIZE_MULT_GP3];
|
||||
capacity *= hc_wp_size;
|
||||
media->capacity[MMC_PARTITION_GP4] = capacity;
|
||||
|
||||
/* Determine the erase size */
|
||||
erase_size = (sd_mmc_extract_uint32_bits(media->csd,
|
||||
81, 5) + 1) *
|
||||
(sd_mmc_extract_uint32_bits(media->csd, 86, 5)
|
||||
+ 1);
|
||||
for (index = MMC_PARTITION_BOOT_1; index <= MMC_PARTITION_GP4;
|
||||
index++) {
|
||||
if (media->capacity[index] != 0) {
|
||||
/* Enable the partitions */
|
||||
err = mmc_switch(media, EXT_CSD_ERASE_GROUP_DEF,
|
||||
EXT_CSD_PARTITION_ENABLE);
|
||||
if (err) {
|
||||
sdhc_error("Failed to enable partition access\n");
|
||||
return err;
|
||||
}
|
||||
|
||||
/* Use HC erase group size */
|
||||
erase_size = hc_erase_size / media->write_bl_len;
|
||||
break;
|
||||
}
|
||||
}
|
||||
media->erase_blocks = erase_size;
|
||||
media->trim_mult = ext_csd[EXT_CSD_TRIM_MULT];
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int mmc_set_partition(struct storage_media *media,
|
||||
unsigned int partition_number)
|
||||
{
|
||||
uint8_t partition_config;
|
||||
|
||||
/* Validate the partition number */
|
||||
if ((partition_number > MMC_PARTITION_GP4)
|
||||
|| (!media->capacity[partition_number]))
|
||||
return -1;
|
||||
|
||||
/* Update the partition register */
|
||||
partition_config = media->partition_config;
|
||||
partition_config &= ~EXT_CSD_PART_ACCESS_MASK;
|
||||
partition_config |= partition_number;
|
||||
|
||||
/* Select the new partition */
|
||||
int ret = mmc_switch(media, EXT_CSD_PART_CONF, partition_config);
|
||||
if (!ret)
|
||||
media->partition_config = partition_config;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
const char *mmc_partition_name(struct storage_media *media,
|
||||
unsigned int partition_number)
|
||||
{
|
||||
static const char * const partition_name[8] = {
|
||||
"User", /* 0 */
|
||||
"Boot 1", /* 1 */
|
||||
"Boot 2", /* 2 */
|
||||
"RPMB", /* 3 */
|
||||
"GP 1", /* 4 */
|
||||
"GP 2", /* 5 */
|
||||
"GP 3", /* 6 */
|
||||
"GP 4" /* 7 */
|
||||
};
|
||||
|
||||
if (partition_number >= ARRAY_SIZE(partition_name))
|
||||
return "";
|
||||
return partition_name[partition_number];
|
||||
}
|
||||
Reference in New Issue
Block a user