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mb/google/nissa/var/nivviks: Disable PCIe WLAN pins

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Nivviks uses CNVi WLAN, so disable the PCIe-related GPIOs.

BUG=b:218929856
TEST=Boot to OS on nivviks and check that WLAN still works.

Change-Id: I68f12490b0f09658e1307828b0e4488504f50e61
Signed-off-by: Reka Norman <rekanorman@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64214
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
This commit is contained in:
Reka Norman
2022-05-09 20:45:40 +10:00
committed by Werner Zeh
parent f2f785dbbe
commit 48e16f76c5
1 changed files with 18 additions and 2 deletions
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20
src/mainboard/google/brya/variants/nivviks/gpio.c
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@@ -8,6 +8,10 @@
/* Pad configuration in ramstage for nivviks board_id = 0 */ /* Pad configuration in ramstage for nivviks board_id = 0 */
static const struct pad_config board_id0_overrides[] = { static const struct pad_config board_id0_overrides[] = {
/* D7 : WLAN_CLKREQ_ODL */
PAD_NC(GPP_D7, NONE),
/* H3 : WLAN_PCIE_WAKE_ODL */
PAD_NC(GPP_H3, NONE),
/* R4 : I2S2_SCLK ==> I2S_SPK_BCLK_R */ /* R4 : I2S2_SCLK ==> I2S_SPK_BCLK_R */
PAD_CFG_NF(GPP_R4, NONE, DEEP, NF2), PAD_CFG_NF(GPP_R4, NONE, DEEP, NF2),
/* R5 : I2S2_SFRM ==> I2S_SPK_LRCK_R */ /* R5 : I2S2_SFRM ==> I2S_SPK_LRCK_R */
@@ -30,18 +34,30 @@ static const struct pad_config board_id0_overrides[] = {
PAD_CFG_NF(GPP_S7, NONE, DEEP, NF2), PAD_CFG_NF(GPP_S7, NONE, DEEP, NF2),
}; };
/* Pad configuration in ramstage for nivviks board_id >= 1 */
static const struct pad_config override_gpio_table[] = {
/* D7 : WLAN_CLKREQ_ODL */
PAD_NC(GPP_D7, NONE),
/* H3 : WLAN_PCIE_WAKE_ODL */
PAD_NC(GPP_H3, NONE),
};
/* Pad configuration in ramstage for nirwen */ /* Pad configuration in ramstage for nirwen */
static const struct pad_config override_gpio_table_nirwen[] = { static const struct pad_config override_gpio_table_nirwen[] = {
/* B4 : SSD_PERST_L */ /* B4 : SSD_PERST_L */
PAD_CFG_GPO(GPP_B4, 1, DEEP), PAD_CFG_GPO(GPP_B4, 1, DEEP),
/* D6 : SRCCLKREQ1# ==> SSD_CLKREQ_ODL */ /* D6 : SRCCLKREQ1# ==> SSD_CLKREQ_ODL */
PAD_CFG_NF(GPP_D6, NONE, DEEP, NF1), PAD_CFG_NF(GPP_D6, NONE, DEEP, NF1),
/* D7 : WLAN_CLKREQ_ODL */
PAD_NC(GPP_D7, NONE),
/* D11 : EN_PP3300_SSD */ /* D11 : EN_PP3300_SSD */
PAD_CFG_GPO(GPP_D11, 1, DEEP), PAD_CFG_GPO(GPP_D11, 1, DEEP),
/* E13 : SRCCLKREQ1# ==> WWAN_EN */ /* E13 : SRCCLKREQ1# ==> WWAN_EN */
PAD_CFG_GPO(GPP_E13, 1, DEEP), PAD_CFG_GPO(GPP_E13, 1, DEEP),
/* E17 : SSD_PLN_L */ /* E17 : SSD_PLN_L */
PAD_CFG_GPO(GPP_E17, 1, PLTRST), PAD_CFG_GPO(GPP_E17, 1, PLTRST),
/* H3 : WLAN_PCIE_WAKE_ODL */
PAD_NC(GPP_H3, NONE),
}; };
/* Early pad configuration in bootblock for nivviks */ /* Early pad configuration in bootblock for nivviks */
@@ -116,8 +132,8 @@ const struct pad_config *variant_gpio_override_table(size_t *num)
} }
if (id == 1) { if (id == 1) {
*num = 0; *num = ARRAY_SIZE(override_gpio_table);
return NULL; return override_gpio_table;
} }
/* board_id >= 2 means nirwen */ /* board_id >= 2 means nirwen */