soc/intel/tigerlake: Move TCSS FW latency macros to tcss.h

This patch moves TCSS firmware latency related macros from
`tcss_pcierp.asl` to SoC specific `tcss.h`.

TEST=Able to build and boot Google/Volteer.

Change-Id: I96416f3b68d853c9a5a44c499719f154aa15f0ca
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70486
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/intel/tigerlake/acpi/tcss.asl

@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 #include <soc/iomap.h>
+#include <soc/tcss.h>
 
 /*
  * Type C Subsystem(TCSS) topology provides Runtime D3 support for USB host controller(xHCI),