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mb/google/brox/var/brox: update thermal settings to start fan early

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Current existing temperature thresholds of TSR1 sensor are set at 60C
to start fan. Due to this CPU gets hot and temperature goes over 80C.
In this situation, fan does not even start to lower down CPU temperature.

With updated new settings based on tuning from thermal team, start fan
early at 40C for TSR0 and TSR1 so the CPU temperature stays below 80C.

BUG=b:339493551
TEST=Built and tested on google/brox board

Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Change-Id: I4765c13c10e436733d8c9d017085968daa561ccc
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82784
Reviewed-by: Eric Lai <ericllai@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
This commit is contained in:
Sumeet Pawnikar
2024-06-03 17:59:49 +05:30
committed by Felix Held
parent f90d5d8820
commit 49acc32cba
1 changed files with 31 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

38
src/mainboard/google/brox/variants/brox/overridetree.cb
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@@ -36,18 +36,42 @@ chip soc/intel/alderlake
register "options.tsr[0].desc" = ""DRAM_SOC"" register "options.tsr[0].desc" = ""DRAM_SOC""
register "options.tsr[1].desc" = ""Fan-Inlet"" register "options.tsr[1].desc" = ""Fan-Inlet""
# TODO: below values are initial reference values only
## Active Policy ## Active Policy
register "policies.active" = "{ register "policies.active" = "{
[0] = { [0] = {
.target = DPTF_CPU,
.thresholds = {
TEMP_PCT(95, 90),
TEMP_PCT(92, 80),
TEMP_PCT(89, 60),
TEMP_PCT(85, 40),
TEMP_PCT(80, 30),
}
},
[1] = {
.target = DPTF_TEMP_SENSOR_0,
.thresholds = {
TEMP_PCT(54, 95),
TEMP_PCT(52, 90),
TEMP_PCT(50, 80),
TEMP_PCT(48, 50),
TEMP_PCT(46, 30),
TEMP_PCT(44, 25),
TEMP_PCT(42, 20),
TEMP_PCT(40, 15),
}
},
[2] = {
.target = DPTF_TEMP_SENSOR_1, .target = DPTF_TEMP_SENSOR_1,
.thresholds = { .thresholds = {
TEMP_PCT(85, 90), TEMP_PCT(54, 95),
TEMP_PCT(80, 80), TEMP_PCT(52, 90),
TEMP_PCT(75, 70), TEMP_PCT(50, 80),
TEMP_PCT(70, 60), TEMP_PCT(48, 50),
TEMP_PCT(65, 50), TEMP_PCT(46, 30),
TEMP_PCT(60, 40), TEMP_PCT(44, 25),
TEMP_PCT(42, 20),
TEMP_PCT(40, 15),
} }
} }
}" }"