arch/x86: Remove XIP_ROM_SIZE

When adding XIP stages on x86, the -P parameter was used to
pass a page size that covers the entire file to add. The same
can now be achieved with --pow2page and we no longer need to
define a static Konfig for the purpose.

TEST: Build asus/p2b and lenovo/x60 with "--pow2page -v -v" and
inspect the generated make.log files. The effective pagesize is
reduced from 64kB to 16kB for asus/p2b giving more freedom
for the stage placement inside CBFS. Pagesize remained at 64kB
for lenovo/x60.

Change-Id: I5891fa2c2bb2d44077f745619162b143d083a6d1
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41820
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Keith Hui <buurin@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Kyösti Mälkki
2020-05-25 08:52:07 +03:00
committed by Nico Huber
parent c36469e0b1
commit 49c44cdccb
3 changed files with 1 additions and 12 deletions

View File

@@ -70,11 +70,6 @@ config NO_FIXED_XIP_ROM_SIZE
to unnecessary alignment constraints in cbfs for romstage.
Therefore, allow those chipsets a path to not be burdened.
config XIP_ROM_SIZE
hex
depends on !NO_FIXED_XIP_ROM_SIZE
default 0x10000
config SETUP_XIP_CACHE
bool
depends on !NO_XIP_EARLY_STAGES