From 4a9e7c2bd0e403b2e67756d7f0298a4c99fea830 Mon Sep 17 00:00:00 2001 From: Tim Crawford Date: Thu, 9 Feb 2023 08:43:53 -0700 Subject: [PATCH] mb/system76/rpl: Use S3 instead of S0ix Change-Id: Ib161c3eb6cf5af815e2ab53f38b5f7786b2e1949 Signed-off-by: Tim Crawford --- src/mainboard/system76/rpl/Kconfig | 2 ++ src/mainboard/system76/rpl/devicetree.cb | 2 -- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mainboard/system76/rpl/Kconfig b/src/mainboard/system76/rpl/Kconfig index 9425100713..17abba1d21 100644 --- a/src/mainboard/system76/rpl/Kconfig +++ b/src/mainboard/system76/rpl/Kconfig @@ -6,6 +6,7 @@ config BOARD_SYSTEM76_RPL_COMMON select DRIVERS_INTEL_USB4_RETIMER select EC_SYSTEM76_EC select HAVE_ACPI_TABLES + select HAVE_ACPI_RESUME select HAVE_CMOS_DEFAULT select HAVE_OPTION_TABLE select INTEL_GMA_HAVE_VBT @@ -13,6 +14,7 @@ config BOARD_SYSTEM76_RPL_COMMON select MAINBOARD_HAS_TPM2 select MEMORY_MAPPED_TPM select NO_UART_ON_SUPERIO + select SOC_INTEL_ALDERLAKE_S3 select SOC_INTEL_COMMON_BLOCK_HDA_VERB select SOC_INTEL_COMMON_BLOCK_TCSS select SOC_INTEL_COMMON_BLOCK_USB4 diff --git a/src/mainboard/system76/rpl/devicetree.cb b/src/mainboard/system76/rpl/devicetree.cb index cd3cd12f9b..7128508193 100644 --- a/src/mainboard/system76/rpl/devicetree.cb +++ b/src/mainboard/system76/rpl/devicetree.cb @@ -11,8 +11,6 @@ chip soc/intel/alderlake # Enable Enhanced Intel SpeedStep register "eist_enable" = "1" - register "s0ix_enable" = "1" - # Enable C6 DRAM register "enable_c6dram" = "1"