AGESA: Use pcidev_on_root()

We have constant CONFIG_CBB==0, replace ill dev_find_slot()
with safe pcidev_on_root();

Change-Id: Ieb2030fa3d77a9f49fc5faf12b92b5f00f49d354
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/26482
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/southbridge/amd/agesa/hudson/lpc.c

@@ -38,7 +38,7 @@ static void lpc_init(struct device *dev)
 	struct device *sm_dev;
 
 	/* Enable the LPC Controller */
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
+	sm_dev = pcidev_on_root(0x14, 0);
 	dword = pci_read_config32(sm_dev, 0x64);
 	dword |= 1 << 20;
 	pci_write_config32(sm_dev, 0x64, dword);

src/southbridge/amd/agesa/hudson/sd.c

@@ -25,7 +25,7 @@ static void sd_init(struct device *dev)
 {
 	u32 stepping;
 
-	stepping = pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x18, 3)), 0xFC);
+	stepping = pci_read_config32(pcidev_on_root(0x18, 3), 0xFC);
 
 	struct southbridge_amd_agesa_hudson_config *sd_chip =
 		(struct southbridge_amd_agesa_hudson_config *)(dev->chip_info);

src/southbridge/amd/agesa/hudson/spi.c

@@ -81,7 +81,7 @@ void spi_init(void)
 {
 	struct device *dev;
 
-	dev = dev_find_slot(0, PCI_DEVFN(0x14, 3));
+	dev = pcidev_on_root(0x14, 3);
 	spibar = pci_read_config32(dev, 0xA0) & ~0x1F;
 }