soc/amd/common/block/gpio_banks/Kconfig: add option for non-soc/ chips

southbridge/amd/pi/hudson uses the common GPIO bank access code from
soc/amd, but doesn't provide all functionality that would be needed to
use the full functionality. Add a Kconfig option that switches off some
functionality in the common SoC GPIO access code, so that more of the
functionality proviced by the common SoC GPIO code can be used in the
AMD binaryPI chipset and board code.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ib10d5d5580aab30a359aa001bb6fc7e9fdb8fc41
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56783
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Held
2021-08-03 20:09:54 +02:00
parent 99c4a29cdc
commit 4b027690b6
3 changed files with 17 additions and 2 deletions

View File

@@ -18,6 +18,7 @@ config SOUTHBRIDGE_SPECIFIC_OPTIONS
select SOC_AMD_COMMON_BLOCK_ACPIMMIO
select SOC_AMD_COMMON_BLOCK_ACPIMMIO_BIOSRAM
select SOC_AMD_COMMON_BLOCK_BANKED_GPIOS
select SOC_AMD_COMMON_BLOCK_BANKED_GPIOS_NON_SOC_CODEBASE
select SOC_AMD_COMMON_BLOCK_PCI_MMCONF
config EHCI_BAR